Abstract: A process is provided for manufacturing bi-polar transistors integrated on silicon. To form transistors of very small dimensions, a layer of polycrystalline silicon is deposited (after a localized oxidization step) which is etched and which is doped so as to serve as doping source for P.sup.+ extrinsic base regions of the transistor. After doping of the P intrinsic base, the oxide and/or nitride is then deposited at low pressure which is implanted with an impurity facilitating dissolution thereof. On the vertical walls of the polycrystalline silicon around the base, the nitride is not dissolved. Elsewhere it is easily dissolved. Advantage is taken of the oxide or nitride thickness which remains to form by diffusion of an N.sup.+ emitter region which will not extend laterally as far as the P.sup.+ type extrinsic base but which will allow to remain an intrinsic base of very small thickness. The emitter diffusion may take place through a second polycrystalline silicon layer.

Abstract: A method for the self alignment of differently doped regions in a silicon substrate. According to this method one uses the controlled thermal flow of a resin for defining successive stepped doping zones. This applies for example to the formation of emitters and bases for transistors of an integrated circuit.

Abstract: The voltage behaviour of a Schottky diode is improved by providing a Schottky diode of the type comprising an epitaxial layer locally covered with a metal layer and by depleting the space charge zone in the epitaxial layer at the periphery of the metal layer. This depletion is obtained by implanting ions counter balancing the initial doping of the epitaxial layer.

Abstract: A method for producing field-effect transistors of the insulated-grid MOS-type, with a precise positioning of the gate in relation to the source and drain regions, providing for the preliminary formation of these regions (43) and (44) by diffusion from portions of doped silica, such as (70), these portions subsequently being used as masks for forming the gate (45) and establishing its external connection (72).