Patents by Inventor Marceline Kelly Tchambake Yapti

Marceline Kelly Tchambake Yapti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11522556
    Abstract: In certain aspects, an analog-to-digital converter (ADC) includes a comparator having a first input, a second input, and an output. The ADC also includes a digital-to-analog converter (DAC) coupled to the first input of the comparator, a switching circuit, a first capacitor coupled between the first input of the comparator and the switching circuit, a second capacitor coupled between the first input of the comparator and the switching circuit, and an amplifying circuit having an input and an output, wherein the input of the amplifying circuit is coupled to the switching circuit. The ADC further includes a first switch coupled between the output of the amplifying circuit and the DAC, and a successive approximation register (SAR) having an input and an output, wherein the input of the SAR is coupled to the output of the comparator, and the output of the SAR is coupled to the DAC.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: December 6, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Behzad Sheikholeslami, Marceline Kelly Tchambake Yapti, Prateek Tripathi, Hongying Wang
  • Patent number: 10784883
    Abstract: In certain aspects, an analog-to-digital converter includes a first capacitive digital-to-analog converter (DAC), a second capacitive DAC, and a comparator including a first input, a second input, and an output. The analog-to-digital converter also includes a switch circuit including a first input coupled to the first capacitive DAC, a second input coupled to the second capacitive DAC, a first output coupled to the first input of the comparator, and a second output coupled to the second input of the comparator. The analog-to-digital converter further includes a first switch coupled between the output of the comparator and the first input of the comparator, and a successive approximation register (SAR) coupled to the output of the comparator, the first capacitive DAC, and the second capacitive DAC.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: September 22, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Prateek Tripathi, Behzad Sheikholeslami, Marceline Kelly Tchambake Yapti