Patents by Inventor Marcello Leone

Marcello Leone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6154163
    Abstract: A successive approximation register has a serial input and output comprises a chain of logic circuits of the bistable type which have selectable input terminals feedback connected by a storage and control element and logic gate circuits of the OR-type, and connected to a serial line through respective internal switches communicating the serial line to input terminals of the logic circuits in said chain, the serial line forming an input to a flip-flop of the D type which is the output element of the register.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: November 28, 2000
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Annamaria Rossi, Giona Fucili, Marcello Leone, Maurizio Nessi
  • Patent number: 6069513
    Abstract: A toggle flip-flop with reduced integration area, comprising a flip-flop of the D-type with an inverting input stage and a master-slave portion. Three transistors connected to the inverting stage form a logic gate of the XOR type whereto the output terminal of the master-slave portion is fed back.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: May 30, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Annamaria Rossi, Giona Fucili, Marcello Leone, Maurizio Nessi
  • Patent number: 5943000
    Abstract: A digital-to-analog converter includes a potentiometric string suitable for realizing a relatively high number of bits that significantly reduces the silicon area requirement and simplifies mismatch compensation. The structure includes a first resistance string to realize a first DAC to convert a first number of most significative bits, and a second potentiometric string functionally connected in cascade to the first, but realized with MOS transistors. The structure of the invention allows the coupling of the two DACs in cascade by exploiting the MOS transistors that form the second potentiometric string, that is, the second DAC, thus avoiding the use of operational switches or amplifiers which may provide error sources. Moreover, the structure of the invention lends itself to the implementation of efficient compensation circuits for integral and differential linearity errors.
    Type: Grant
    Filed: October 22, 1997
    Date of Patent: August 24, 1999
    Assignee: SGS-Thomson Microelectronics S.r.L.
    Inventors: Maurizio Nessi, Rinaldo Castello, Giona Fucili, Marcello Leone, Annamaria Rossi
  • Patent number: 5808477
    Abstract: A sense and protection circuit against short circuits for digital outputs, comprising a logic gating circuit of the exclusive OR type (EX1) which has a first input terminal connected to a signal input node (IN) and an output terminal which is connected to an input terminal of a signal level shifter output stage (B). A second logic gating circuit of the exclusive OR type (EX2) has a first input terminal connected to the input node (IN) and a second input terminal connected, through an inverting circuit (IN1), to an output terminal (OUT) of the output stage (B). A second input terminal of the first logic gate circuit is coupled to an output terminal of the second logic gate circuit through a comparator circuit (SCH1) and a delay circuit means (C,R,D).
    Type: Grant
    Filed: May 31, 1996
    Date of Patent: September 15, 1998
    Assignees: SGS-Thomson Microelectronics S.r.l., Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Alberto Gola, Giona Fucili, Marcello Leone, Patrizia Milazzo
  • Patent number: 5541540
    Abstract: A drive circuit includes a voltage source supplying a reference voltage at its output; a voltage elevating circuit connected to a supply voltage and to the output of the voltage source, and supplying at its output, under normal operating conditions, a drive voltage greater than the supply voltage and increasing with the reference voltage. The input of the voltage source is connected to the output of the voltage elevating circuit, and defines a positive feedback path resulting in an increase in the reference voltage corresponding to an increase in the drive voltage, and therefore results in a corresponding increase in the drive voltage up to a maximum permissible value, thus providing for a sufficient drive voltage for driving the gate-source junction of power MOS transistors, even in the presence of a low supply voltage.
    Type: Grant
    Filed: October 5, 1994
    Date of Patent: July 30, 1996
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Roberto Gariboldi, Marcello Leone
  • Patent number: 5427316
    Abstract: A sucking straw has a substantially flat configuration and is provided with a plurality of adjoining beverage sucking channels. The straw fits the contour of the lips so that no air may go through when liquid is being sucked by the user. The amount of liquid being sucked is substantially greater than with conventional straws.
    Type: Grant
    Filed: May 24, 1994
    Date of Patent: June 27, 1995
    Inventor: Marcello Leone
  • Patent number: 5376832
    Abstract: A drive circuit includes a voltage source supplying a reference voltage at its output; a voltage elevating circuit connected to a supply voltage and to the output of the voltage source, and supplying at its output, under normal operating conditions, a drive voltage greater than the supply voltage and increasing with the reference voltage. The input of the voltage source is connected to the output of the voltage elevating circuit, and defines a positive feedback path resulting in an increase in the reference voltage corresponding to an increase in the drive voltage, and therefore results in a corresponding increase in the drive voltage up to a maximum permissible value, thus providing for a sufficient drive voltage for driving the gate-source junction of power MOS transistors, even in the presence of a low supply voltage.
    Type: Grant
    Filed: March 11, 1993
    Date of Patent: December 27, 1994
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Roberto Gariboldi, Marcello Leone
  • Patent number: 5025947
    Abstract: A beverage cup has a cover or a wall therethrough a substantially rectangular cross-section straw can be threaded in a tight manner, the cover or wall being formed with breakage-facilitating weakened lines and the straw including a plurality of longitudinal suction ducts.
    Type: Grant
    Filed: October 27, 1989
    Date of Patent: June 25, 1991
    Inventor: Marcello Leone