Patents by Inventor Marcello Ravasio
Marcello Ravasio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11600665Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.Type: GrantFiled: October 13, 2020Date of Patent: March 7, 2023Assignee: Micron Technology, Inc.Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
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Publication number: 20210091140Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.Type: ApplicationFiled: October 13, 2020Publication date: March 25, 2021Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
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Patent number: 10910437Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.Type: GrantFiled: May 23, 2019Date of Patent: February 2, 2021Assignee: Micron Technology, Inc.Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
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Patent number: 10886332Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.Type: GrantFiled: January 7, 2020Date of Patent: January 5, 2021Assignee: Micron Technology, Inc.Inventors: Samuele Sciarrillo, Marcello Ravasio
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Patent number: 10854674Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.Type: GrantFiled: August 31, 2017Date of Patent: December 1, 2020Assignee: Micron Technology, Inc.Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
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Patent number: 10777743Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.Type: GrantFiled: October 25, 2017Date of Patent: September 15, 2020Assignee: Micron Technology, Inc.Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
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Publication number: 20200144329Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.Type: ApplicationFiled: January 7, 2020Publication date: May 7, 2020Inventors: Samuele Sciarrillo, Marcello Ravasio
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Patent number: 10573689Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.Type: GrantFiled: December 7, 2018Date of Patent: February 25, 2020Assignee: Micron Technology, Inc.Inventors: Samuele Sciarrillo, Marcello Ravasio
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Publication number: 20190355789Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.Type: ApplicationFiled: May 23, 2019Publication date: November 21, 2019Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
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Patent number: 10367033Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.Type: GrantFiled: August 24, 2018Date of Patent: July 30, 2019Assignee: Micron Technology, Inc.Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
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Publication number: 20190109176Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.Type: ApplicationFiled: December 7, 2018Publication date: April 11, 2019Inventors: Samuele Sciarrillo, Marcello Ravasio
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Publication number: 20190067372Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.Type: ApplicationFiled: August 24, 2018Publication date: February 28, 2019Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
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Patent number: 10163978Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.Type: GrantFiled: April 5, 2017Date of Patent: December 25, 2018Assignee: Micron Technology, Inc.Inventors: Samuele Sciarrillo, Marcello Ravasio
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Patent number: 10084016Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.Type: GrantFiled: November 21, 2013Date of Patent: September 25, 2018Assignee: MICRON TECHNOLOGY, INC.Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
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Publication number: 20180047896Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.Type: ApplicationFiled: October 25, 2017Publication date: February 15, 2018Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
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Publication number: 20170365642Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.Type: ApplicationFiled: August 31, 2017Publication date: December 21, 2017Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
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Patent number: 9831428Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.Type: GrantFiled: December 17, 2015Date of Patent: November 28, 2017Assignee: Micron Technology, Inc.Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
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Patent number: 9806129Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.Type: GrantFiled: February 25, 2014Date of Patent: October 31, 2017Assignee: MICRON TECHNOLOGY, INC.Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
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Patent number: 9773844Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.Type: GrantFiled: December 16, 2015Date of Patent: September 26, 2017Assignee: Micron Technology, Inc.Inventors: Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini, Gabriel L. Donadio
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Publication number: 20170207273Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.Type: ApplicationFiled: April 5, 2017Publication date: July 20, 2017Inventors: Samuele Sciarrillo, Marcello Ravasio