Patents by Inventor Marcello Ravasio

Marcello Ravasio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10367033
    Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: July 30, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
  • Publication number: 20190109176
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.
    Type: Application
    Filed: December 7, 2018
    Publication date: April 11, 2019
    Inventors: Samuele Sciarrillo, Marcello Ravasio
  • Publication number: 20190067372
    Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 28, 2019
    Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
  • Patent number: 10163978
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: December 25, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Samuele Sciarrillo, Marcello Ravasio
  • Patent number: 10084016
    Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: September 25, 2018
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
  • Publication number: 20180047896
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
    Type: Application
    Filed: October 25, 2017
    Publication date: February 15, 2018
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
  • Publication number: 20170365642
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Application
    Filed: August 31, 2017
    Publication date: December 21, 2017
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Patent number: 9831428
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: November 28, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
  • Patent number: 9806129
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: October 31, 2017
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Patent number: 9773844
    Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: September 26, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini, Gabriel L. Donadio
  • Publication number: 20170207273
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.
    Type: Application
    Filed: April 5, 2017
    Publication date: July 20, 2017
    Inventors: Samuele Sciarrillo, Marcello Ravasio
  • Patent number: 9640588
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: May 2, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Samuele Sciarrillo, Marcello Ravasio
  • Publication number: 20160104748
    Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
    Type: Application
    Filed: December 16, 2015
    Publication date: April 14, 2016
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini, Gabriel L. Donadio
  • Publication number: 20160104837
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
    Type: Application
    Filed: December 17, 2015
    Publication date: April 14, 2016
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
  • Patent number: 9257431
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: February 9, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti
  • Patent number: 9246100
    Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: January 26, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini, Gabriel L. Donadio
  • Publication number: 20160020256
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element formed in series with the switch element. A smallest lateral dimension of the switch element is different than a smallest lateral dimension of the memory element.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventors: Samuele Sciarrillo, Marcello Ravasio
  • Publication number: 20150243708
    Abstract: The disclosed technology relates generally to integrated circuit devices, and in particular to cross-point memory arrays and methods for fabricating the same. In one aspect, a method of fabricating cross-point memory arrays comprises forming a memory cell material stack which includes a first active material and a second active material over the first active material, wherein one of the first and second active materials comprises a storage material and the other of the first and second active materials comprises a selector material.
    Type: Application
    Filed: February 25, 2014
    Publication date: August 27, 2015
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Fabio Pellizzer, Innocenzo Tortorelli, Roberto Somaschini, Cristina Casellato, Riccardo Mottadelli
  • Publication number: 20150137061
    Abstract: A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 21, 2015
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Ombretta Donghi, Marcello Ravasio, Samuele Sciarrillo, Roberto Somaschini
  • Publication number: 20150084156
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
    Type: Application
    Filed: September 25, 2013
    Publication date: March 26, 2015
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti