Patents by Inventor Marcellus R. Chen

Marcellus R. Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8705771
    Abstract: Separate control of the operation of an audio amplifier and a charge pump that synthesizes a negative voltage supply (VSS) for improving the dynamic range of the audio amplifier. The audio amplifier is typically powered by a single positive power supply (VDD) and the charge pump is arranged to synthesize a negative voltage supply rail (VSS) that enables a greater dynamic range for the amplifier's “on” and “shut down” modes of operation. Also, when the audio amplifier enters its shut down mode of operation to create at least some isolation from Line_In audio signals provided at the amplifier's output by other electronic devices, the amplifier's charge pump stays “on” and continues to provide the negative voltage supply rail (VSS). In this way, the greater dynamic range offered by the presence of both the positive and negative voltage rails is provided even if the amplifier is in a shut down mode.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: April 22, 2014
    Assignee: National Semiconductor Corporation
    Inventors: Marcellus R. Chen, Ansuya P. Bhatt
  • Patent number: 6338032
    Abstract: A circuit and method for trimming and simulating the effect of trimming a plurality of IC parameters. Trim signals which affect respective IC parameters are generated with respective digital-to-analog converters (DACs) in response to digital bit patterns. A parameter to be trimmed is selected, a bit pattern is applied to a DAC and a trim signal generated, and the value of the parameter that results is measured. Bit patterns are iteratively created until one is identified that brings the parameter within an acceptable range. The identified bit pattern is then permanently encoded using programmable subcircuits containing poly fuses. The bit patterns are received serially to conserve I/O pins. A number of DACs are provided to enable a number of different parameters to be simulated and trimmed. A switching network is provided that selectably switches otherwise inaccessible internal nodes to an I/O pin for measurement. The trimming circuitry.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: January 8, 2002
    Assignee: Analog Devices, Inc.
    Inventor: Marcellus R. Chen
  • Patent number: 6194962
    Abstract: A system for adaptively trimming the input offset voltage of an op amp employing an input stage with complementary differential pairs provides accurate VDos trimming over the amplifier's entire common-mode input range, by providing an “adaptive” trim signal that varies with the current conducted by one of the complementary pairs. Switching circuitry insures that only one differential pair is active at a time, except in a transition region in which both pairs are partially conducting. The use of an adaptive trim signal enables Vos to be kept low over the full range of common-mode input voltages, including in the amplifier's transition region.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: February 27, 2001
    Assignee: Analog Devices, Inc.
    Inventor: Marcellus R. Chen