Patents by Inventor Marcelo Cintra

Marcelo Cintra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210149812
    Abstract: Examples described herein includes an apparatus comprising: a network interface configured to: receive a request to copy data from a local memory to a remote memory; based on a configuration that the network interface is to manage a cache store the data into the cache and record that the data is stored in the cache. In some examples, store the data in the cache comprises store most recently evicted data from the local memory into the cache. In some examples, the network interface is to store data evicted from the local memory that is not stored into the cache into one or more remote memories.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 20, 2021
    Inventors: Sujoy SEN, Durgesh SRIVASTAVA, Thomas E. WILLIS, Bassam N. COURY, Marcelo CINTRA
  • Publication number: 20210105207
    Abstract: Examples described herein include one or more processors; a network interface; and a direct memory access (DMA) engine communicatively coupled to the one or more processors. In some examples, the DMA engine is to receive a DMA data access request and based on an address in the DMA data access request corresponding to a remote memory device, the DMA engine is to cause the network interface to generate at least one packet for transmission to the remote memory device. In some examples, the DMA data access request includes a source address, a destination address, and a length. In some examples, if the source address corresponds to a local memory device and the destination address corresponds to a remote memory device, the DMA engine is to cause the network interface to generate at least one packet for transmission to the remote memory device, wherein the at least one packet includes data stored at the source address.
    Type: Application
    Filed: November 24, 2020
    Publication date: April 8, 2021
    Inventors: Sujoy SEN, Durgesh SRIVASTAVA, Thomas E. WILLIS, Bassam N. COURY, Marcelo CINTRA
  • Publication number: 20210073151
    Abstract: Examples described herein and includes at least one processor and a direct memory access (DMA) device. In some examples, the DMA device is to: access a command from a memory region allocated to receive commands for execution by the DMA device, wherein the command is to access content from a local memory device or remote memory node. In some examples, the DMA device is to: determine if the content is stored in a local memory device or a remote memory node based on a configuration that indicates whether a source address refers to a memory address associated with the local memory device or the remote memory node and whether a destination address refers to a memory address associated with the local memory device or the remote memory node. In some examples, the DMA device is to: copy the content from a local memory device or copy the content to the local memory device using a memory interface.
    Type: Application
    Filed: November 24, 2020
    Publication date: March 11, 2021
    Inventors: Sujoy SEN, Durgesh SRIVASTAVA, Thomas E. WILLIS, Bassam N. COURY, Marcelo CINTRA
  • Publication number: 20210075633
    Abstract: Examples described herein relate to a network interface. In some examples, the network interface is to access data designated for transmission in at least one packet to multiple memory nodes by inclusion of an multicast identifier of a memory node group and transmit the at least one packet to a destination network device, wherein the multicast identifier of the memory node group in the at least one packet is to cause an intermediate network device to multicast the packet to multiple memory nodes. In some examples, a memory node comprises a memory pool that includes one or more of: volatile memory, non-volatile memory, or persistent memory. In some examples, the intermediate network device comprises a switch configured to determine network addresses of memory nodes associated with the multicast identifier of the memory node group.
    Type: Application
    Filed: November 24, 2020
    Publication date: March 11, 2021
    Inventors: Sujoy SEN, Thomas E. WILLIS, Durgesh SRIVASTAVA, Marcelo CINTRA, Bassam N. COURY
  • Publication number: 20210019069
    Abstract: Examples herein relate to a system capable of coupling to a remote memory pool, the system comprising: a memory controller and an interface to a connection, the interface coupled to the memory controller. In some examples, the interface is to translate a format of a memory access request to a format accepted by the memory controller and the memory controller is to provide the translated memory access request in a format accepted by a media. In some examples, a controller is to measure a number of addressable regions that are least accessed and cause at least one of the least accessed regions to be evicted to a local or remote memory device with relatively higher latency.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 21, 2021
    Inventors: Sujoy SEN, Thomas E. WILLIS, Durgesh SRIVASTAVA, Marcelo CINTRA, Bassam N. COURY, Donald L. FAW, Francois DUGAST
  • Patent number: 9335944
    Abstract: Methods and apparatus related to in-place change between transient and persistent state for data structures on non-volatile memory are described. In one embodiment, controller logic causes a change in a state of a first portion of one or more non-volatile memory devices between a persistent state and a transient state and without moving data stored in the first portion of the one or more non-volatile memory devices. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: May 10, 2016
    Assignee: Intel Corporation
    Inventors: Matthias Gries, Marcelo Cintra, Thomas Lehnig, Sebastian Steibl, Tor Lund-Larsen
  • Publication number: 20160034224
    Abstract: Methods and apparatus related to in-place change between transient and persistent state for data structures on non-volatile memory are described. In one embodiment, controller logic causes a change in a state of a first portion of one or more non-volatile memory devices between a persistent state and a transient state and without moving data stored in the first portion of the one or more non-volatile memory devices. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: July 31, 2015
    Publication date: February 4, 2016
    Applicant: INTEL CORPORATION
    Inventors: Matthias Gries, Marcelo Cintra, Thomas Lehnig, Sebastian Steibl, Tor Lund-Larsen
  • Patent number: 9128824
    Abstract: Methods and apparatus related to in-place change between transient and persistent state for data structures on non-volatile memory are described. In one embodiment, controller logic causes a change in a state of a first portion of one or more non-volatile memory devices between a persistent state and a transient state and without moving data stored in the first portion of the one or more non-volatile memory devices. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 24, 2012
    Date of Patent: September 8, 2015
    Assignee: Intel Corporation
    Inventors: Matthias Gries, Marcelo Cintra, Thomas Lehnig, Sebastian Steibl, Tor Lund-Larsen
  • Publication number: 20140181367
    Abstract: Methods and apparatus related to in-place change between transient and persistent state for data structures on non-volatile memory are described. In one embodiment, controller logic causes a change in a state of a first portion of one or more non-volatile memory devices between a persistent state and a transient state and without moving data stored in the first portion of the one or more non-volatile memory devices. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 24, 2012
    Publication date: June 26, 2014
    Inventors: Matthias Gries, Marcelo Cintra, Thomas Lehnig, Sebastian Steibl, Tor Lund-Larsen