Patents by Inventor Marcelo Samsoniuk

Marcelo Samsoniuk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11804666
    Abstract: An electrical connector mountable to a substrate (e.g. a Printed Circuit Board, PCB) can include a terminal housing having a front wall and an opposing back wall. An opening is provided in the front wall for receiving a plug inside the terminal housing, opposing side walls, and a top wall and an opposing bottom wall. The bottom wall has an inner surface facing the inside of the terminal housing and an outer surface facing away from the inside of the terminal housing. The outer surface (can have at least two retention pins projecting from the outer surface for being inserted into corresponding holes in the PCB. A first retention pin can be positioned on the outer surface so as to be arranged asymmetrically with respect to a second retention pin.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: October 31, 2023
    Assignee: Unify Patente GmbH & Co. KG
    Inventors: Marcelo Samsoniuk, Osvaldo Sato, Diogo Granado
  • Publication number: 20220045447
    Abstract: An electrical connector mountable to a substrate (e.g. a Printed Circuit Board, PCB) can include a terminal housing having a front wall and an opposing back wall. An opening is provided in the front wall for receiving a plug inside the terminal housing, opposing side walls, and a top wall and an opposing bottom wall. The bottom wall has an inner surface facing the inside of the terminal housing and an outer surface facing away from the inside of the terminal housing. The outer surface (can have at least two retention pins projecting from the outer surface for being inserted into corresponding holes in the PCB. A first retention pin can be positioned on the outer surface so as to be arranged asymmetrically with respect to a second retention pin.
    Type: Application
    Filed: September 28, 2018
    Publication date: February 10, 2022
    Inventors: Marcelo Samsoniuk, Osvaldo Sato, Diogo Granado
  • Patent number: 11227092
    Abstract: A main board for a computer device can include main board components arranged on a first surface of the main board and Trusted Platform Module (TPM) components arranged on the first surface of the main board. The TPM components can be located in a predetermined area of the main board that is detachable from the main board (e.g. by means of a predetermined break line). A method for producing an embodiment of the main board with an integrated TPM can include producing a Printed Circuit Board (PCB); arranging a plurality of main board components in a first area of the PCB; and arranging TPM components in a second area of the PCB that is a detachable predetermined area of the main board. A predetermined breakline which at least partly surrounds the predetermined area can be formed by drilling holes to form a perforated line.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: January 18, 2022
    Assignee: Unify Patente GmbH & Co. KG
    Inventors: Marcelo Samsoniuk, Paulo Henrique Bernardi, Evandro Hauenstein
  • Patent number: 11171653
    Abstract: A method for programming a Field Programmable Gate Array (FPGA) via a network, the network being operated according to a predetermined communications protocol, can include: establishing a communication connection between the FPGA and an external master, setting the FPGA into a programming mode, the master providing an FPGA programming image to the FPGA in a sequence of frames so that the frames can be parsed and enabling the FPGA to write only during receiving the payload section of the frames. The FPGA programming image and parsing the sequence of frames can be performed by a permanently programmed or hardwired logic component. A network, FPGA, and a communication system can be configured to utilize embodiments of the method.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: November 9, 2021
    Assignee: Unify Patente GmbH & Co. KG
    Inventors: Marcelo Samsoniuk, Paolo Henrique Bernardi, Diogo Wachtel Granado
  • Publication number: 20210271798
    Abstract: A main board for a computer device can include main board components arranged on a first surface of the main board and Trusted Platform Module (TPM) components arranged on the first surface of the main board. The TPM components can be located in a predetermined area of the main board that is detachable from the main board (e.g. by means of a predetermined break line). A method for producing an embodiment of the main board with an integrated TPM can include producing a Printed Circuit Board (PCB); arranging a plurality of main board components in a first area of the PCB; and arranging TPM components in a second area of the PCB that is a detachable predetermined area of the main board. A predetermined breakline which at least partly surronds the predetermined area can be formed by drilling holes to form a perforated line.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 2, 2021
    Inventors: Marcelo Samsoniuk, Paulo Henrique Bernardi, Evandro Hauenstein
  • Patent number: 10958473
    Abstract: When operating a first unit in a daisy chain of units allowing bidirectional communication, each unit is capable to transmit and to receive signals. A plurality of units including the said first unit transmits a respective signal to a preceding neighbor unit preceding in said daisy chain and to a following neighbor unit following in the daisy chain. In the daisy chain, the first unit determines whether or not it receives a signal from both of these neighbor units or not and if so, said first unit operates so as to put the at least one subunit into a first state. If the at least one subunit is not put into a first state, it operates so as to put the at least one subunit into a second state different from said first state.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: March 23, 2021
    Assignee: Unify Patente GmbH & Co. KG
    Inventors: Marcelo Samsoniuk, Paulo Henrique Bernardi, Diogo Wachtel Granado
  • Publication number: 20200321965
    Abstract: A method for programming a Field Programmable Gate Array (FPGA) via a network, the network being operated according to a predetermined communications protocol, can include: establishing a communication connection between the FPGA and an external master, setting the FPGA into a programming mode, the master providing an FPGA programming image to the FPGA in a sequence of frames so that the frames can be parsed and enabling the FPGA to write only during receiving the payload section of the frames. The FPGA programming image and parsing the sequence of frames can be performed by a permanently programmed or hardwired logic component. A network, FPGA, and a communication system can be configured to utilize embodiments of the method.
    Type: Application
    Filed: December 28, 2017
    Publication date: October 8, 2020
    Inventors: Marcelo Samsoniuk, Paolo Henrique Bernardi, Diogo Wachtel Granado
  • Publication number: 20190342116
    Abstract: When operating a first unit in a daisy chain of units allowing bidirectional communication, each unit is capable to transmit and to receive signals. A plurality of units including the said first unit transmits a respective signal to a preceding neighbor unit preceding in said daisy chain and to a following neighbor unit following in the daisy chain. In the daisy chain, the first unit determines whether or not it receives a signal from both of these neighbor units or not and if so, said first unit operates so as to put the at least one subunit into a first state. If the at least one subunit is not put into a first state, it operates so as to put the at least one subunit into a second state different from said first state.
    Type: Application
    Filed: January 11, 2017
    Publication date: November 7, 2019
    Inventors: Marcelo Samsoniuk, Paulo Henrique Bernardi, Diogo Wachtel Granado