Abstract: An integrated circuit comprises a memory device including a memory plane having non-volatile memory cells and being non-observable in read mode from outside the memory device, a controller, internal to the memory device, configured to detect the memorized content of the memory plane, and when the memorized content contains locking content, automatically lock any access to the memory plane from outside the memory device, the integrated circuit then being in a locked status, and authorize delivery outside the memory device of at least one sensitive datum stored in the memory plane.

Abstract: In an embodiment an integrated device includes a first physical unclonable function module configured to generate an initial data group and management module configured to generate an output data group from at least the initial data group, authorize only D successive deliveries of the output data group on a first output interface of the device, D being a non-zero positive integer, and prevent any new generation of the output data group.

Abstract: In an embodiment a noon-volatile memory device includes a memory plane including at least one memory area including an array of memory cells having two rows and N columns, wherein each memory cell comprises a state transistor having a control gate and a floating gate selectable by a vertical selection transistor buried in a substrate and including a buried selection gate, and wherein each column of memory cells includes a pair of twin memory cells, two selection transistors of the pair of twin memory cells having a common selection gate and a processor configured to store in the memory area information including a succession of N bits so that, with exception of the last bit of the succession, a current bit of the succession is stored in two memory cells located on the same row and on two adjacent columns and a current bit and the following bit are respectively stored in two twin cells.

Abstract: A method may be for detecting potentially suspicious operation of an electronic device configured to operate in the course of activity sessions. The method may include within the device, a metering, from an initial instant of the number of activity sessions having a duration below a first threshold, and a comparison of this number with a second threshold.

Abstract: A method for writing and reading data in a main nonvolatile memory having target pages in which data are to be written and read, the method including providing a nonvolatile buffer having an erased area, providing a volatile cache memory, and receiving a write command to update a target page with updating data the length of which can be lower than the length of a page. The method also includes, in response to the write command, writing the updating data into the erased area of the nonvolatile buffer, together with management data of a first type, and recording an updated version of the target page in the cache memory or updating in the cache memory a previously updated version of the target page.

Abstract: A method may be for detecting potentially suspicious operation of an electronic device configured to operate in the course of activity sessions. The method may include within the device, a metering, from an initial instant of the number of activity sessions having a duration below a first threshold, and a comparison of this number with a second threshold.

Abstract: A method for writing and reading data in a main nonvolatile memory having target pages in which data are to be written and read, the method including providing a nonvolatile buffer having an erased area, providing a volatile cache memory, and receiving a write command to update a target page with updating data the length of which can be lower than the length of a page. The method also includes, in response to the write command, writing the updating data into the erased area of the nonvolatile buffer, together with management data of a first type, and recording an updated version of the target page in the cache memory or updating in the cache memory a previously updated version of the target page.

Abstract: To control low-pressure fluorescent lamps, there is provided a device comprising a first change-over switch circuit and a second change-over switch circuit, respectively including a first power transistor and a second power transistor. The first change-over switch circuit first of all measures the period of time when the second power transistor is on. Then, secondly, it turns the first power transistor on for a period equal to the period measured.

Abstract: A control device for a fluorescent lamp comprises two independent circuits based on a power transistor and a switching control circuit, series-connected between a high voltage and the ground. The power transistor has a diode that is reverse mounted between its two electrodes. The switching control circuit comprises a circuit for the detection of a voltage at the terminals of the diode greater than a voltage reference value and a circuit for the detection of the integral of the current flowing in the transistor that is greater than a current reference value corresponding to the power of the lamp.

Abstract: A control device for a fluorescent lamp comprises two independent circuits based on a power transistor and a switching control circuit, series-connected between a high voltage and the ground. The power transistor has a diode that is reverse mounted between its two electrodes. The switching control circuit comprises a circuit for the detection of a voltage at the terminals of the diode greater than a voltage reference value and a circuit for the detection of the integral of the current flowing in the transistor that is greater than a current reference value corresponding power of the lamp.

Abstract: To produce pulses in a cyclically repetitive mode while modifying the production frequency, a counter looped on itself is used. The outputs of this counter are connected to the address inputs of a memory. The signals read in the memory represent pulses to be produced. When it is sought to increase the period of reading the totality of the memory gradually, some of the words of this memory are read for a greater period of time. In the invention, words are chosen for which this addressing will be maintained by comparing the reverse of the reading address with a given value and by deciding, as a function of the result of this comparison, whether the word read at this address must be read for a longer duration or not. It is shown that this circuit is very easy to make and requires but few components. The circuit made can be used particularly in the field of the control of three-phase synchronous motors.

Abstract: A control device for a low-pressure fluorescent lamp placed in an oscillating circuit comprises a circuit for the detection of the frequency of the current in the lamp to deliver an information element at output as a function of the lit or unlit state of the lamp. This information element may be used to activate a first circuit to detect the end of an alternation in the lamp or a second circuit to detect the end of an alternation in the lamp, making it possible to let the lamp work at the resonance frequency of the oscillating circuit or at a frequency higher than the resonance frequency.

Abstract: An electronic starter for a fluorescent lamp comprises a power switch, controlled at its gate by a gate-control circuit and an auxiliary supply circuit that gives the necessary logic supply voltage to the gate-control circuit on a terminal of a capacitor. The gate-control circuit comprises a comparator with two voltage references to measure a duration of preheating of the lamp, the input of this comparator receiving the logic voltage given by the capacitor, the output of the comparator being used to command the closing or the opening of the switch. In one improvement, there is provided a preheating current measurement circuit to detect the optimum current for lighting up the lamp once the necessary preheating time has elapsed.

Abstract: A control and monitoring circuit for a power switch comprises a first portion (20) connected to this switch and fed with reference to a floating voltage (V.sub.F) of an electrode of this switch, a second portion (10) connected to circuits external to the switch and fed with reference to a fixed voltage, a coder (40) arranged on the side of the second portion and a suitable decoder (50) arranged on the side of the first portion.

Abstract: A control and monitoring circuit for a power switch comprises a first portion (20) connected to this switch and fed with reference to a floating voltage (V.sub.F) of an electrode of this switch, a second portion (10) connected to circuits external to the switch and fed with reference to a fixed voltage, a coder (40) arranged on the side of the second portion and a suitable decoder (50) arranged on the side of the first portion.