Patents by Inventor Marco BONORA

Marco BONORA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10014714
    Abstract: A method is disclosed which makes use of an intelligent transfer algorithm for a UPS when the UPS is required to switch from a high efficiency mode of operation (VFD or VI) to an independent mode of operation (VFI), as a result of an under voltage condition occurring on the bypass line of the UPS. The method involves performing successive voltage measurements at a plurality of points during a first half cycle of an AC mains (Vout) signal to integrate the Vout signal until a zero crossing of the Vout signal is detected. Successive voltage measurements are used to detect the disruption of the Vout signal and a percentage of missing voltage area from the Vout signal during the disruption. The UPS then supplies a compensation voltage (Vcomp) which is added to the Vout signal to restore the Vout signal to a level at least approximately equal to a nominal AC mains voltage output signal (Voutnominal).
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: July 3, 2018
    Assignee: Vartiv S.R.L.
    Inventors: Ugo Cinti, Guerino Vassallo, Marco Bonora
  • Patent number: 9825489
    Abstract: An uninterruptible power supply system has a three-level T-Type inverter A method that improves clearing a short of a load coupled to an output of the inverter when the load experiences a short circuit event includes commutating with a controller each phase of the inverter in a two level mode current generation when output voltage and output current of that phase have the same direction and commutating each phase of the inverter in a three level mode current generation when the output voltage and output current of that phase have opposite directions.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: November 21, 2017
    Assignee: Vertiv S.R.L.
    Inventors: Ugo Cinti, Guerino Vassallo, Matteo Lo Torto, Gianni Dipietrangelo, Marco Bonora, Edwin Shires
  • Publication number: 20160218557
    Abstract: An uninterruptible power supply system has a three-level T-Type inverter A method that improves clearing a short of a load coupled to an output of the inverter when the load experiences a short circuit event includes commutating with a controller each phase of the inverter in a two level mode current generation when output voltage and output current of that phase have the same direction and commutating each phase of the inverter in a three level mode current generation when the output voltage and output current of that phase have opposite directions.
    Type: Application
    Filed: January 26, 2015
    Publication date: July 28, 2016
    Applicant: Chloride Srl
    Inventors: Ugo CINTI, Guerino VASSALLO, Matteo LO TORTO, Gianni DIPIETRANGELO, Marco BONORA
  • Patent number: 9362781
    Abstract: A UPS system may be operated selectively in either a high efficiency mode or a low efficiency mode. An inductor is connected in series between the transfer switch and a secondary power source. The transfer switch includes thyristors arranged in a reverse connected configuration. A controller synchronizes gate commands to the thyristors in order to synchronize reserve voltage introduced by the inverter. If the load currents are not in phase with a fundamental voltage of the secondary power source, the controller waits up to a first time period in order to estimate when current through the switches will reach zero. If the out of phase current will reach zero by the end of a second time period, the inverter is switched on at the end of the second time period.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 7, 2016
    Assignee: Chloride Srl
    Inventors: Pier Ugo Costa, Marco Bonora, Graziano Galuppi
  • Publication number: 20150256029
    Abstract: A method is disclosed which makes use of an intelligent transfer algorithm for a UPS when the UPS is required to switch from a high efficiency mode of operation (VFD or VI) to an independent mode of operation (VFI), as a result of an under voltage condition occurring on the bypass line of the UPS. The method involves performing successive voltage measurements at a plurality of points during a first half cycle of an AC mains (Vout) signal to integrate the Vout signal until a zero crossing of the Vout signal is detected. Successive voltage measurements are used to detect the disruption of the Vout signal and a percentage of missing voltage area from the Vout signal during the disruption. The UPS then supplies a compensation voltage (Vcomp) which is added to the Vout signal to restore the Vout signal to a level at least approximately equal to a nominal AC mains voltage output signal (Voutnominal).
    Type: Application
    Filed: February 18, 2015
    Publication date: September 10, 2015
    Inventors: Ugo CINTI, Guerino VASSALLO, Marco BONORA
  • Publication number: 20140097690
    Abstract: A UPS system may be operated selectively in either a high efficiency mode or a low efficiency mode. An inductor is connected in series between the transfer switch and a secondary power source. The transfer switch includes thyristors arranged in a reverse connected configuration. A controller synchronizes gate commands to the thyristors in order to synchronize reserve voltage introduced by the inverter. If the load currents are not in phase with a fundamental voltage of the secondary power source, the controller waits up to a first time period in order to estimate when current through the switches will reach zero. If the out of phase current will reach zero by the end of a second time period, the inverter is switched on at the end of the second time period.
    Type: Application
    Filed: March 14, 2013
    Publication date: April 10, 2014
    Applicant: CHLORIDE SRL
    Inventors: Pier Ugo COSTA, Marco BONORA, Graziano GALUPPI