Abstract: A method is disclosed which makes use of an intelligent transfer algorithm for a UPS when the UPS is required to switch from a high efficiency mode of operation (VFD or VI) to an independent mode of operation (VFI), as a result of an under voltage condition occurring on the bypass line of the UPS. The method involves performing successive voltage measurements at a plurality of points during a first half cycle of an AC mains (Vout) signal to integrate the Vout signal until a zero crossing of the Vout signal is detected. Successive voltage measurements are used to detect the disruption of the Vout signal and a percentage of missing voltage area from the Vout signal during the disruption. The UPS then supplies a compensation voltage (Vcomp) which is added to the Vout signal to restore the Vout signal to a level at least approximately equal to a nominal AC mains voltage output signal (Voutnominal).

Abstract: An uninterruptible power supply system has a three-level T-Type inverter A method that improves clearing a short of a load coupled to an output of the inverter when the load experiences a short circuit event includes commutating with a controller each phase of the inverter in a two level mode current generation when output voltage and output current of that phase have the same direction and commutating each phase of the inverter in a three level mode current generation when the output voltage and output current of that phase have opposite directions.

Abstract: An uninterruptible power supply system has a three-level T-Type inverter A method that improves clearing a short of a load coupled to an output of the inverter when the load experiences a short circuit event includes commutating with a controller each phase of the inverter in a two level mode current generation when output voltage and output current of that phase have the same direction and commutating each phase of the inverter in a three level mode current generation when the output voltage and output current of that phase have opposite directions.

Abstract: A UPS system may be operated selectively in either a high efficiency mode or a low efficiency mode. An inductor is connected in series between the transfer switch and a secondary power source. The transfer switch includes thyristors arranged in a reverse connected configuration. A controller synchronizes gate commands to the thyristors in order to synchronize reserve voltage introduced by the inverter. If the load currents are not in phase with a fundamental voltage of the secondary power source, the controller waits up to a first time period in order to estimate when current through the switches will reach zero. If the out of phase current will reach zero by the end of a second time period, the inverter is switched on at the end of the second time period.

Abstract: A method is disclosed which makes use of an intelligent transfer algorithm for a UPS when the UPS is required to switch from a high efficiency mode of operation (VFD or VI) to an independent mode of operation (VFI), as a result of an under voltage condition occurring on the bypass line of the UPS. The method involves performing successive voltage measurements at a plurality of points during a first half cycle of an AC mains (Vout) signal to integrate the Vout signal until a zero crossing of the Vout signal is detected. Successive voltage measurements are used to detect the disruption of the Vout signal and a percentage of missing voltage area from the Vout signal during the disruption. The UPS then supplies a compensation voltage (Vcomp) which is added to the Vout signal to restore the Vout signal to a level at least approximately equal to a nominal AC mains voltage output signal (Voutnominal).

Abstract: A UPS system may be operated selectively in either a high efficiency mode or a low efficiency mode. An inductor is connected in series between the transfer switch and a secondary power source. The transfer switch includes thyristors arranged in a reverse connected configuration. A controller synchronizes gate commands to the thyristors in order to synchronize reserve voltage introduced by the inverter. If the load currents are not in phase with a fundamental voltage of the secondary power source, the controller waits up to a first time period in order to estimate when current through the switches will reach zero. If the out of phase current will reach zero by the end of a second time period, the inverter is switched on at the end of the second time period.