Patents by Inventor Marco Fiorentino

Marco Fiorentino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10509167
    Abstract: Systems and methods are provided for processing an optical signal. An example system may include a source disposed on a substrate and capable of emitting the optical signal. A first waveguide is formed in the substrate to receive the optical signal. A first coupler is disposed on the substrate to receive a reflected portion of the optical signal. A second waveguide is formed in the substrate to receive the reflected portion from the first coupler. A second coupler is formed in the substrate to mix the optical signal and the reflected portion to form a mixed signal. Photodetectors are formed in the substrate to convert the mixed signal to an electrical signal. A processor is electrically coupled to the substrate and programmed to convert the electrical signal from a time domain to a frequency domain to determine a phase difference between the optical signal and the reflected portion.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: December 17, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Amit S. Sharma, John Paul Strachan, Marco Fiorentino
  • Patent number: 10503851
    Abstract: In example implementations, a method executed by a processor is provided. The method receives a simulated photonic data input based on a theoretical photonic design that meets a target specification. A complementary metal-oxide semiconductor (CMOS) circuit design is designed based on the simulated photonic data input using a pre-layout simulation. An experimental photonic data input based on a fabricated photonics device that meets the target specification is received. The CMOS circuit is designed based on the experimental photonic data input using a post-layout simulation. A physical circuit CMOS circuit design and a layout that includes detailed physical dimensions associated with the physical CMOS circuit design that is based on the pre-layout and the post-layout are transmitted to a CMOS foundry.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: December 10, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Tsung-Ching Huang, Chin-Hui Chen, Marco Fiorentino, Raymond G. Beausoleil
  • Patent number: 10481462
    Abstract: In example implementations, an apparatus includes a serializer, a re-timing buffer coupled to the serializer, and a plurality of segments coupled to the re-timing buffer. The plurality of segments may be used for controlling a timing of an electrical signal. Each one of the plurality of segments may include a segment serializer, a timing control coupled to the segment serializer and a driver coupled to the timing control. In addition, a phase clock may be coupled to the segment serializer and the timing control of each one of the plurality of segments.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: November 19, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Nan Qi, Cheng Li, Marco Fiorentino
  • Publication number: 20190331858
    Abstract: In example implementations, an optical connector is provided. The optical connector includes a jumper holder, a base bracket, and an optical ferrule. The jumper holder holds a plurality of ribbon fibers. The base bracket is coupled to an electrical substrate to mate with the jumper holder. The optical ferrule is coupled to an end of each one of the plurality of ribbon fibers. The optical ferrule is laterally inserted into a corresponding orthogonal socket that is coupled to a silicon interposer on the electrical substrate to optically mate the optical ferrule to the orthogonal socket.
    Type: Application
    Filed: April 30, 2018
    Publication date: October 31, 2019
    Inventors: Kevin B. Leigh, Paul Kessler Rosenberg, Sagi Mathai, Mir Ashkan Seyedi, Michael Renne Ty Tan, Wayne Victor Sorin, Marco Fiorentino
  • Publication number: 20190324205
    Abstract: Systems and methods are provided for processing an optical signal. An example system may include a source disposed on a substrate and capable of emitting the optical signal. A first waveguide is formed in the substrate to receive the optical signal. A first coupler is disposed on the substrate to receive a reflected portion of the optical signal. A second waveguide is formed in the substrate to receive the reflected portion from the first coupler. A second coupler is formed in the substrate to mix the optical signal and the reflected portion to form a mixed signal. Photodetectors are formed in the substrate to convert the mixed signal to an electrical signal. A processor is electrically coupled to the substrate and programmed to convert the electrical signal from a time domain to a frequency domain to determine a phase difference between the optical signal and the reflected portion.
    Type: Application
    Filed: April 23, 2018
    Publication date: October 24, 2019
    Inventors: Amit S. Sharma, John Paul Strachan, Marco Fiorentino
  • Publication number: 20190317286
    Abstract: A photonic integrated circuit package includes two arrays or sets of integrated comb laser modules that are bonded to a silicon interposer. Each comb laser of an array has a common or overlapping spectral range, with each laser in the array being optically coupled to a local optical bus. The effective spectral range of the lasers in each array are different, or distinct, as to each array. An optical coupler is disposed within the silicon interposer and is optically coupled to each of the local optical buses. An ASIC (application specific integrated circuit) is bonded to the silicon interposer and provides control and operation of the comb laser modules.
    Type: Application
    Filed: April 16, 2018
    Publication date: October 17, 2019
    Inventors: Mir Ashkan Seyedi, Marco Fiorentino, Geza Kurczveil, Raymond G. Beausoleil
  • Patent number: 10436956
    Abstract: Examples include a method for fabricating a grating mirror using a computing device that comprises calculating a target phase change across the grating mirror. The target phase change may correspond to a target wavefront shape in a beam of light reflected from a grating patter. The method may also comprise generating the grating pattern comprising a plurality of lines with line widths, line period spacings, and line thicknesses corresponding to the target phase change across the grating mirror using the computing device. In such examples, a set of coordinates may be generated using the computing device with each coordinate identifying a location of a line of the plurality of lines, a line width of the line, a line period spacing of the line, and a line thickness of the line.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: October 8, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: David A Fattal, Jingjing Li, Raymond G Beausoleil, Marco Fiorentino
  • Patent number: 10429601
    Abstract: A photonic integrated circuit package includes two arrays or sets of integrated comb laser modules that are bonded to a silicon interposer. Each comb laser of an array has a common or overlapping spectral range, with each laser in the array being optically coupled to a local optical bus. The effective spectral range of the lasers in each array are different, or distinct, as to each array. An optical coupler is disposed within the silicon interposer and is optically coupled to each of the local optical buses. An ASIC (application specific integrated circuit) is bonded to the silicon interposer and provides control and operation of the comb laser modules.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: October 1, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Mir Ashkan Seyedi, Marco Fiorentino, Geza Kurczveil, Raymond G. Beausoleil
  • Patent number: 10432319
    Abstract: One example of a receiver includes a first stage, a second stage, a third stage, and an automatic gain controller. The first stage amplifies an input signal to provide a first signal. The second stage amplifies or attenuates the first signal to provide a second signal based on a tunable gain of the second stage. The tunable gain is adjusted in response to a differential signal. The third stage amplifies the second signal to provide an output signal. The automatic gain controller provides the differential signal based on a comparison between a peak voltage of the output signal and the sum of a common mode voltage of the output signal and an offset voltage.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: October 1, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kehan Zhu, Cheng Li, Marco Fiorentino
  • Patent number: 10431707
    Abstract: An example device in accordance with an aspect of the present disclosure includes an avalanche photodetector to enable carrier multiplication for increased responsivity, and a receiver based on source-synchronous CMOS and including adaptive equalization. The photodetector and receiver are monolithically integrated on a single chip.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: October 1, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Cheng Li, Zhihong Huang, Marco Fiorentino, Raymond G. Beausoleil
  • Patent number: 10432315
    Abstract: One example includes an optical transmitter system. The system includes a waveguide to receive and propagate an optical signal. The system also includes a ring modulation system comprising a ring resonator that is optically coupled to the waveguide and is to resonate a given wavelength of the optical signal in response to an input data signal that is provided to a modulation amplifier to provide carrier injection to change a refractive index of the ring resonator to resonate the given wavelength of the optical signal to modulate the optical signal. The system further includes a tuning controller associated with the ring modulation system. The tuning controller can implement iterative feedback tuning of the ring modulation system based on a relative amplitude of an optical intensity of the given wavelength in the ring resonator and a variable reference amplitude to substantially stabilize the ring resonator with respect to the given wavelength.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: October 1, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Janet Chen, Cheng Li, Marco Fiorentino, Raymond G Beausoleil
  • Publication number: 20190204507
    Abstract: One example includes an apparatus that includes a plurality of input/output (I/O) ports and a body portion. The plurality of I/O ports can be arranged at a plurality of peripheral surfaces of the body portion. The body portion includes a solid dielectric material having a substantially constant index of refraction. The body portion also includes parallel planar surfaces spaced apart by and bounded by the plurality of peripheral surfaces. The solid dielectric material in the body portion can be writable via a laser-writing process to form an optical waveguide extending between a set of the plurality of I/O ports.
    Type: Application
    Filed: March 11, 2019
    Publication date: July 4, 2019
    Inventors: Raymond G. Beausoleil, Marco Fiorentino, Jason Pelc, Charles M. Santori, Terrel L. Morris
  • Patent number: 10333516
    Abstract: In one example, a device includes a photodetector to generate an electrical signal in response to an optical signal and a transimpedance amplifier unit to receive the electrical signal. In one example, the transimpedance amplifier unit may include a first inverter unit, a second inverter unit coupled to the first inverter unit, and a third inverter unit coupled to the second inverter unit. In one example the third inverter unit may include a feedback resistor and a first n-type transistor in parallel to the feedback resistor, where the first n-type transistor is to provide a variable gain of the third inverter unit.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: June 25, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Cheng Li, Kunzhi Yu, Marco Fiorentino, Raymond G Beausoleil
  • Patent number: 10333628
    Abstract: According to one example, errors in a logical signal from a data slicer are detected and a power supply voltage is adjusted based on the detected errors.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: June 25, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Cheng Li, Marco Fiorentino, Raymond G Beausoleil, Sr.
  • Publication number: 20190190610
    Abstract: One example includes a bias-based Mach-Zehnder modulation (MZM) system. The system includes a Mach-Zehnder modulator to receive and split an optical input signal and to provide an intensity-modulated optical output signal based on a high-frequency data signal to modulate a relative phase of the split optical input signal to transmit data and based on a bias voltage to modulate the relative phase of the split optical input signal to tune the Mach-Zehnder modulator. The system also includes a bias feedback controller to compare a detection voltage associated with the intensity-modulated output signal with a reference voltage to measure an extinction ratio associated with an optical power of the intensity-modulated optical output signal and to adjust the bias voltage based on the comparison to substantially maximize the extinction ratio.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 20, 2019
    Inventors: Cheng Li, Jim Huang, Ashkan Seyedi, Marco Fiorentino, Raymond G. Beausoleil
  • Patent number: 10261256
    Abstract: One example includes an apparatus that includes a plurality of input/output (I/O) ports and a body portion. The plurality of I/O ports can be arranged at a plurality of peripheral surfaces of the body portion. The body portion includes a solid dielectric material having a substantially constant index of refraction. The body portion also includes parallel planar surfaces spaced apart by and bounded by the plurality of peripheral surfaces. The solid dielectric material in the body portion can be writable via a laser-writing process to form an optical waveguide extending between a set of the plurality of I/O ports.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: April 16, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Raymond G Beausoleil, Marco Fiorentino, Jason Pelc, Charles M Santori, Terrel L Morris
  • Publication number: 20190094466
    Abstract: An example system for multi-wavelength optical signal splitting is disclosed. The example disclosed herein comprises a first splitter, a second splitter, and a modulator. The system receives a multi-wavelength optical signal and an electrical signal, wherein the multi-wavelength optical signal comprises a plurality of optical wavelengths and has a power level. The first splitter is to split the plurality of optical wavelengths into a plurality of optical wavelength groups. The second splitter is to split the multi-wavelength optical signal or the plurality of optical wavelength groups into a plurality of lower power signal groups. The modulator is to encode the electrical signal into the plurality of optical wavelength groups, the plurality of lower power signal groups, or a combination thereof.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Inventors: Raymond G. Beausoleil, Di Liang, Marco Fiorentino, Geza Kurczveil, Mir Ashkan Seyedi, Zhihong Huang
  • Patent number: 10243662
    Abstract: One example includes a bias-based Mach-Zehnder modulation (MZM) system. The system includes a Mach-Zehnder modulator to receive and split an optical input signal and to provide an intensity-modulated optical output signal based on a high-frequency data signal to modulate a relative phase of the split optical input signal to transmit data and based on a bias voltage to modulate the relative phase of the split optical input signal to tune the Mach-Zehnder modulator. The system also includes a bias feedback controller to compare a detection voltage associated with the intensity-modulated output signal with a reference voltage to measure an extinction ratio associated with an optical power of the intensity-modulated optical output signal and to adjust the bias voltage based on the comparison to substantially maximize the extinction ratio.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: March 26, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Cheng Li, Jim Huang, Ashkan Seyedi, Marco Fiorentino, Raymond G Beausoleil
  • Publication number: 20190089466
    Abstract: An example optical receiver may have an optical receiver front-end, four slicers, and a logic block. The optical receiver front-end may include a transimpedance amplifier to convert a photodiode output signal to a voltage signal. Three of the slicers may be data slicers, and one of the slicers may be an edge slicer. The slicers may each: shift the voltage signal based on an offset voltage set for the respective slicer, determine whether the shifted voltage signal is greater than a threshold value and generate a number of comparison signals based on the determining, and generate multiple digital signals by demuxing the comparison signals. The logic block may perform PAM-4 to binary decoding based on the data signals output by the data slicers and clock-and-data-recovery based on the digital signals output by the edge slicer.
    Type: Application
    Filed: April 14, 2016
    Publication date: March 21, 2019
    Inventors: Cheng Li, Kunzhi Yu, Marco Fiorentino, Raymond G. Beausoleil
  • Publication number: 20190089129
    Abstract: An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer.
    Type: Application
    Filed: September 14, 2018
    Publication date: March 21, 2019
    Inventors: Di Liang, Geza Kurczveil, Raymond G. Beausoleil, Marco Fiorentino