Abstract: The circuit comprises two registers (SR12, SR8) which temporarily memorize uncompressed and compressed PCM words, respectively. The uncompressed word is sequentially read and a counter (CNT) counts the number of zeroes present in the most significant positions of the absolute value of the word. The compressed word is composed, in the corresponding register, of the sign bit of the uncompressed word, followed by the counting bits of the counter and by the bits of the positions of the uncompressed word following those of the counted zeroes.

Abstract: A transceiver inserted between a source of binary signals and a one-wire line, dialoguing with a similar transceiver in series with another source at the opposite end of the line, comprises two voltage sensors connected in parallel to the line at a point downstream of a terminal impedance at which the line voltage substantially equals the mean of the voltage levels simultaneously generated by the two sources. The two voltage sensors have thresholds respectively lying at a lower and an upper intermediate level between the two binary signal levels (L, H) employed and work into a common signal receiver through a multiplexer so controlled by the local source as to connect that receiver always to that detector whose low or high output signal corresponds to the binary value (L, H) of the signal then arriving from the remote source.

Abstract: A unit cell for a prefabricated semiconductor chip, to be converted into an array of logic gates by selective metallization, comprises two complementary pairs of MOSFETs occupying respective quadrants of a rectangular substrate area, with external gate contacts disposed in respective headers extending along the minor sides of the rectangle. Each header further contains two external channel (source or drain) contacts which with the two external gate contacts form a group of four input/output contacts. Two metallic strips serving as supply buses, parallel to the minor sides, are separated from the two headers by relatively narrow substrate zones so as to define a relatively wide central region between them.

Abstract: A microprocessor associated with a PCM telecommunication network dialogues with remote data-handling components such as other microprocessors through message-interchange circuitry which includes a read/write memory having storage areas individually allocated to several PCM channels, one storage area serving to receive incoming messages destined for the local microprocessor while the remaining storage areas serve for the transmission of outgoing messages intended for respective remote components. A control unit, timed by signals from a synchronization extractor coupled to the network, communicates with the memory to detect state words written by the microprocessor into the memory to indicate the loaded or vacant condition of its storage areas.