Patents by Inventor Marco Jacobs
Marco Jacobs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9241140Abstract: The invention relates to an arrangement for video surveillance with at least one video camera which can be directed into different positions by a remote controlled pan and/or tilt and/or zoom unit and with at least one video signal receiving device, which comprises means for demultiplexing the video Signals of the video camera in such a way that the at least one video signal receiving device receives video Signals generated by the video camera while remaining in one of the different positions only.Type: GrantFiled: December 22, 2005Date of Patent: January 19, 2016Assignee: Robert Bosch GmbHInventors: Marco Jacobs, Johan Groenenboom
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Patent number: 9009365Abstract: Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.Type: GrantFiled: February 20, 2013Date of Patent: April 14, 2015Assignee: Altera CorporationInventors: Gerald George Pechanek, David Strube, Edwin Franklin Barry, Charles W. Kurak, Jr., Carl Donald Busboom, Dale Edward Schneider, Nikos P. Pitsianis, Grayson Morris, Edward A. Wolff, Patrick R. Marchand, Ricardo Rodriguez, Marco Jacobs
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Publication number: 20140059324Abstract: Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.Type: ApplicationFiled: February 20, 2013Publication date: February 27, 2014Inventors: Gerald George Pechanek, David Strube, Edwin Franklin Barry, Charles W. Kurak, JR., Carl Donald Busboom, Dale Edward Schneider, Nikos P. Pitsianis, Grayson Morris, Edward A. Wolff, Patrick R. Marchand, Ricardo Rodriguez, Marco Jacobs
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Patent number: 8073272Abstract: Techniques for performing the processing of blocks of video in multiple stages. Each stage is executed for blocks of data in the frame that need to go through that stage, based on the coding type, before moving to the next stage. This order of execution allows blocks of data to be processed in a nonsequential order, unless the blocks need to go through the same processing stages. Multiple processing elements (PEs) operating in SIMD mode executing the same task and operating on different blocks of data may be utilized, avoiding idle times for the PEs. In another aspect, inverse scan and dequantization operations for blocks of data are merged in a single procedure operating on multiple PEs operating in SIMD mode. This procedure makes efficient use of the multiple PEs and speeds up processing by combining two operations, inverse scan (reordering) and dequantization, which load the execution units differently.Type: GrantFiled: June 2, 2010Date of Patent: December 6, 2011Assignee: Altera CorporationInventors: Doina Petrescu, Trampas Stern, Marco Jacobs, Dan Searles, Charles W. Kurak, Jr.
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Publication number: 20100238999Abstract: Techniques for performing the processing of blocks of video in multiple stages. Each stage is executed for blocks of data in the frame that need to go through that stage, based on the coding type, before moving to the next stage. This order of execution allows blocks of data to be processed in a nonsequential order, unless the blocks need to go through the same processing stages. Multiple processing elements (PEs) operating in SIMD mode executing the same task and operating on different blocks of data may be utilized, avoiding idle times for the PEs. In another aspect, inverse scan and dequantization operations for blocks of data are merged in a single procedure operating on multiple PEs operating in SIMD mode. This procedure makes efficient use of the multiple PEs and speeds up processing by combining two operations, inverse scan (reordering) and dequantization, which load the execution units differently.Type: ApplicationFiled: June 2, 2010Publication date: September 23, 2010Applicant: Altera CorporationInventors: Doina Petrescu, Trampas Stern, Marco Jacobs, Dan Searles, Charles W. Kurak, JR.
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Patent number: 7756347Abstract: Techniques for performing the processing of blocks of video in multiple stages. Each stage is executed for blocks of data in the frame that need to go through that stage, based on the coding type, before moving to the next stage. This order of execution allows blocks of data to be processed in a nonsequential order, unless the blocks need to go through the same processing stages. Multiple processing elements (PEs) operating in SIMD mode executing the same task and operating on different blocks of data may be utilized, avoiding idle times for the PEs. In another aspect, inverse scan and dequantization operations for blocks of data are merged in a single procedure operating on multiple PEs operating in SIMD mode. This procedure makes efficient use of the multiple PEs and speeds up processing by combining two operations, inverse scan (reordering) and dequantization, which load the execution units differently.Type: GrantFiled: February 5, 2007Date of Patent: July 13, 2010Assignee: Altera CorporationInventors: Doina Petrescu, Trampas Stern, Marco Jacobs, Dan Searles, Charles W. Kurak, Jr.
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Publication number: 20100007735Abstract: The invention relates to an arrangement for video surveillance with at least one video camera which can be directed into different positions by a remote controlled pan and/or tilt and/or zoom unit and with at least one video signal receiving device, which comprises means for demultiplexing the video Signals of the video camera in such a way that the at least one video signal receiving device receives video Signals generated by the video camera while remaining in one of the different positions only.Type: ApplicationFiled: December 22, 2005Publication date: January 14, 2010Inventors: Marco Jacobs, Johan Groenenboom
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Publication number: 20070154104Abstract: Techniques for performing the processing of blocks of video in multiple stages. Each stage is executed for blocks of data in the frame that need to go through that stage, based on the coding type, before moving to the next stage. This order of execution allows blocks of data to be processed in a nonsequential order, unless the blocks need to go through the same processing stages. Multiple processing elements (PEs) operating in SIMD mode executing the same task and operating on different blocks of data may be utilized, avoiding idle times for the PEs. In another aspect, inverse scan and dequantization operations for blocks of data are merged in a single procedure operating on multiple PEs operating in SIMD mode. This procedure makes efficient use of the multiple PEs and speeds up processing by combining two operations, inverse scan (reordering) and dequantization, which load the execution units differently.Type: ApplicationFiled: February 5, 2007Publication date: July 5, 2007Applicant: Altera CorporationInventors: Doina Petrescu, Trampas Stern, Marco Jacobs, Dan Searles, Charles Kurak
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Patent number: 7181070Abstract: Techniques for performing the processing of blocks of video in multiple stages. Each stage is executed for blocks of data in the frame that need to go through that stage, based on the coding type, before moving to the next stage. This order of execution allows blocks of data to be processed in a nonsequential order, unless the blocks need to go through the same processing stages. Multiple processing elements (PEs) operating in SIMD mode executing the same task and operating on different blocks of data may be utilized, avoiding idle times for the PEs. In another aspect, inverse scan and dequantization operations for blocks of data are merged in a single procedure operating on multiple PEs operating in SIMD mode. This procedure makes efficient use of the multiple PEs and speeds up processing by combining two operations, inverse scan (reordering) and dequantization, which load the execution units differently.Type: GrantFiled: October 29, 2002Date of Patent: February 20, 2007Assignee: Altera CorporationInventors: Doina Petrescu, Trampas Stern, Marco Jacobs, Dan Searles, Charles W. Kurak, Jr.
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Patent number: 7103621Abstract: Efficient techniques for computation of texture coordinates using scaled conversion operations for a 3D graphics pipeline utilizing a scaled floating point to integer instruction and a scaled integer to floating point instruction to significantly reduce memory requirements. A parallel array VLIW digital signal processor is employed along with specialized scaled conversion instructions and communication operations between the processing elements, which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the graphics pipeline hardware to be efficiently used.Type: GrantFiled: March 31, 2003Date of Patent: September 5, 2006Assignee: PTS CorporationInventors: Ricardo Rodriguez, Marco Jacobs, David Strube
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Publication number: 20040113914Abstract: Efficient techniques for computation of texture coordinates using scaled conversion operations for a 3D graphics pipeline utilizing a scaled floating point to integer instruction and a scaled integer to floating point instruction to significantly reduce memory requirements. A parallel array VLIW digital signal processor is employed along with specialized scaled conversion instructions and communication operations between the processing elements, which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the graphics pipeline hardware to be efficiently used.Type: ApplicationFiled: March 31, 2003Publication date: June 17, 2004Applicant: PTS CorporationInventors: Ricardo Rodriguez, Marco Jacobs, David Strube
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Publication number: 20030161540Abstract: Techniques for performing the processing of blocks of video in multiple stages. Each stage is executed for blocks of data in the frame that need to go through that stage, based on the coding type, before moving to the next stage. This order of execution allows blocks of data to be processed in a nonsequential order, unless the blocks need to go through the same processing stages. Multiple processing elements (PEs) operating in SIMD mode executing the same task and operating on different blocks of data may be utilized, avoiding idle times for the PEs. In another aspect, inverse scan and dequantization operations for blocks of data are merged in a single procedure operating on multiple PEs operating in SIMD mode. This procedure makes efficient use of the multiple PEs and speeds up processing by combining two operations, inverse scan (reordering) and dequantization, which load the execution units differently.Type: ApplicationFiled: October 29, 2002Publication date: August 28, 2003Applicant: BOPS, Inc.Inventors: Doina Petrescu, Trampas Stern, Marco Jacobs, Dan Searles, Charles W. Kurak