Patents by Inventor Marco Jan Bekooij

Marco Jan Bekooij has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8205053
    Abstract: A method and system for accessing memory using an auxiliary memory is presented. According to the invention store and following load instructions accessing same memory locations are identified and a temporal difference is determined. The store instructions comprise an indication for the time interval lapsing until a data element, which is stored by the store instructions, is loaded by a load operation for the first time. Based on this indication the store instruction is given access directly to the main memory or is routed to main memory through an auxiliary memory.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: June 19, 2012
    Assignee: NXP B.V.
    Inventor: Marco Jan Bekooij
  • Publication number: 20090216983
    Abstract: A method and system for accessing memory using an auxiliary memory is presented. According to the invention store and following load instructions accessing same memory locations are identified and a temporal difference is determined. The store instructions comprise an indication for the time interval lapsing until a data element, which is stored by the store instructions, is loaded by a load operation for the first time. Based on this indication the store instruction is given access directly to the main memory or is routed to main memory through an auxiliary memory.
    Type: Application
    Filed: August 11, 2006
    Publication date: August 27, 2009
    Applicant: NXP B.V.
    Inventor: Marco Jan Bekooij
  • Publication number: 20080270676
    Abstract: A data processing system is provided in a stream-based communication environment. The data processing system comprises at least one processing unit (PU1, PU2) for a stream-based processing of a plurality of processing jobs (J1-J5), a memory means (MEM) having an address range; and a plurality of FIFOs memory mapped to part of the address range of the memory means (MEM), respectively. Each of the FIFOs is associated to one of said plurality of processing jobs (j1-j5) to enable their communication. An address translation unit (ATU) is provided for identifying address ranges in the memory means (MEM) which are not currently used by the plurality of FIFOs and for moving the address range of at least one FIFO to a currently unused address range in the memory means (MEM).
    Type: Application
    Filed: January 26, 2006
    Publication date: October 30, 2008
    Applicant: NXP B.V.
    Inventor: Marco Jan Bekooij