Patents by Inventor Marco Ravani

Marco Ravani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110250739
    Abstract: This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Robert J. Falster, Vladimir V. Voronkov, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Publication number: 20110177682
    Abstract: This invention generally relates to a process for suppressing oxygen precipitation in epitaxial silicon wafers having a heavily doped silicon substrate and a lightly N-doped silicon epitaxial layer by dissolving existing oxygen clusters and precipitates within the substrate. Furthermore, the formation of oxygen precipitates is prevented upon subsequent oxygen precipitation heat treatment.
    Type: Application
    Filed: February 4, 2011
    Publication date: July 21, 2011
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Robert J. Falster, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Publication number: 20090252974
    Abstract: This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.
    Type: Application
    Filed: June 17, 2009
    Publication date: October 8, 2009
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Robert J. Falster, Vladimir V. Voronkov, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Publication number: 20090004426
    Abstract: This invention generally relates to a process for suppressing oxygen precipitation in epitaxial silicon wafers having a heavily doped silicon substrate and a lightly N-doped silicon epitaxial layer by dissolving existing oxygen clusters and precipitates within the substrate. Furthermore, the formation of oxygen precipitates is prevented upon subsequent oxygen precipitation heat treatment.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Publication number: 20090004458
    Abstract: This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Vladimir V. Voronkov, Luca Moiraghi, DongMyun Lee, Chanrae Cho, Marco Ravani
  • Publication number: 20060075960
    Abstract: A process for nucleating and growing oxygen precipitates in a silicon wafer, including subjecting a wafer having a non-uniform concentration of crystal lattice vacancies with the concentration of vacancies in the bulk layer being greater than the concentration of vacancies in the surface layer to a non-isothermal heat treatment to form of a denuded zone in the surface layer and to cause the formation and stabilization of oxygen precipitates having an effective radial size 0.5 nm to 30 nm in the bulk layer. The process optionally includes subjecting the stabilized wafer to a high temperature thermal process (e.g. epitaxial deposition, rapid thermal oxidation, rapid thermal nitridation and etc.) at temperatures in the range of 1000 OC to 1275 OC without causing the dissolution of the stabilized oxygen precipitates.
    Type: Application
    Filed: November 21, 2005
    Publication date: April 13, 2006
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Marco Borgini, Daniela Gambaro, Marco Ravani, Michael Ries, Laura Sacchetti, Robert Standley, Robert Falster, Mark Stinson
  • Publication number: 20020179006
    Abstract: The process relates to a process for nucleating and growing oxygen precipitates in a silicon wafer. The process includes subjecting a wafer having a non-uniform concentration of crystal lattice vacancies with the concentration of vacancies in the bulk layer being greater than the concentration of vacancies in the surface layer to a non-isothermal heat treatment to form of a denuded zone in the surface layer and to cause the formation and stabilization of oxygen precipitates having an effective radial size 0.5 nm to 30 nm in the bulk layer. The process optionally includes subjecting the stabilized wafer to a high temperature thermal process (e.g. epitaxial deposition, rapid thermal oxidation, rapid thermal nitridation and etc.) at temperatures in the range of 1000° C. to 1275° C. without causing the dissolution of the stabilized oxygen precipitates.
    Type: Application
    Filed: April 22, 2002
    Publication date: December 5, 2002
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Marco Borgini, Daniela Gambaro, Marco Ravani, Michael J. Ries, Laura Sacchetti, Robert W. Standley, Robert J. Falster, Mark G. Stinson