Patents by Inventor Marco ROVITTO

Marco ROVITTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230360928
    Abstract: A semiconductor die is attached on a die mounting surface of a substrate. An insulating encapsulation of laser direct structuring (LDS) material is molded onto the substrate and the semiconductor die. The insulating encapsulation of LDS material has a front surface including a first portion and a second portion separated by gaps therebetween. Laser direct structuring processing is applied to the first portion of the front surface to structure in the encapsulation of LDS material electrically conductive formations including electrically conductive lines over the front surface and to the second portion of the front surface of the encapsulation of LDS material to form thereon a reinforcing warp-countering structure. The separation gaps are left exempt from laser direct structuring processing and the reinforcing warp-countering structure is electrically insulated from the electrically conductive lines by LDS material left exempt from laser direct structuring processing at the separation gaps.
    Type: Application
    Filed: April 27, 2023
    Publication date: November 9, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco ROVITTO, Dario VITELLO
  • Publication number: 20220392863
    Abstract: A semiconductor chip is arranged on a region of laser direct structuring (LDS) material of a laminar substrate. The semiconductor chip has a front active area facing towards, and a metallized back surface facing away from, the laminar substrate. An encapsulation of LDS material on the laminar substrate encapsulates the semiconductor chip with the metallized back surface of the semiconductor chip exposed at an outer surface of the encapsulation of LDS material. Electrically conductive lines and first vias are structured in the region of LDS material to electrically connect to the front active area of the semiconductor chip. A thermally conductive layer is plated over the outer surface of the encapsulation of LDS material in contact with the metallized back surface of the semiconductor chip. A heat extractor body of thermally conductive material is coupled in heat transfer relationship with the thermally conductive layer.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 8, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Antonio BELLIZZI, Marco ROVITTO
  • Publication number: 20220059369
    Abstract: A semiconductor die is attached to a die pad of a leadframe. The semiconductor die attached to the die pad is arranged in a molding cavity between complementary first and second mold portions. Package material is injected into the molding cavity via at least one injection channel provided in one of the complementary first and second mold portions. Air is evacuated from the molding cavity via at least one air venting channel provided in the other of the complementary first and second mold portions. An exit from the at least one air venting channel may be blocked by a retractable stopper during the injection of the package material.
    Type: Application
    Filed: August 20, 2021
    Publication date: February 24, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco ROVITTO, Pierangelo MAGNI, Fabio MARCHISI
  • Publication number: 20220059368
    Abstract: At least one semiconductor chip or die is held within at a chip retaining formation provided in a chip holding device. The chip holding device is then positioned with the at least one semiconductor chip or die arranged facing a chip attachment location in a chip mounting substrate. This positioning produces a cavity between the at least one semiconductor chip or die arranged at the chip retaining formation and the chip attachment location in the chip mounting substrate. A chip attachment material is dispensed into the cavity. Once cured, the chip attachment material attaches the at least one semiconductor chip or die onto the substrate at the chip attachment location in the chip mounting substrate.
    Type: Application
    Filed: August 10, 2021
    Publication date: February 24, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Fulvio Vittorio FONTANA, Marco ROVITTO