Abstract: Systems and methods for wireless power transfer systems are described. A controller can be coupled to a power rectifier configured to rectify alternating current power into direct current power. The power rectifier can include a first high side transistor, a second high side transistor, a first low side transistor, and a second low side transistor. The controller can be configured to operate the power rectifier in full bridge rectifier mode. The controller can be further configured to detect a misfire event between the wireless power receiver and a wireless power transmitter. The controller can be further configured to, in response to detection of the misfire event, switch an operation mode of the power rectifier from the full bridge rectifier mode to a diode mode.

Abstract: Systems and methods for wireless power transfer systems are described. A controller can be coupled to a power rectifier configured to rectify alternating current power into direct current power. The power rectifier can include a first high side transistor, a second high side transistor, a first low side transistor, and a second low side transistor. The controller can be configured to selectively switch on one or more of the first high side transistor, the second high side transistor, the first low side transistor, and the second low side transistor to operate a wireless power receiver under one of a full bridge rectifier mode and a voltage doubler mode.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposing ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: Methods and apparatuses for controlling a rectified voltage outputted by a rectifier circuit is described. In response to an occurrence of an overvoltage condition, an apparatus can regulate a gate-source voltage of a low-side switching element of the rectifier circuit to control the rectified voltage. The apparatus can include an operational amplifier that can compare a reference voltage and with a scaled voltage measured at a node between the low-side switching element and a high-side switching element of the rectifier circuit. The operational amplifier can output a voltage to regulate a gate-source voltage of a low-side switching element. The apparatus can further include a current sensor configured to sense current flowing through the low-side switching element. A power dissipation of the low-side switching element can be controlled based on the current being sensed by the current sensor.

Abstract: In accordance with an embodiment, a method of operating a piezoelectric transducer configured to transduce mechanical vibrations into transduced electrical signals at a pair of sensor electrodes includes stimulating a resonant oscillation of the piezoelectric transducer by applying at least one pulse electrical stimulation signal to the pair of sensor electrodes; detecting, at the pair of sensor electrodes, at least one electrical signal resulting from the stimulated resonant oscillation, wherein the at least one electrical signal resulting from the stimulated resonant oscillation oscillates at a resonance frequency of the piezoelectric transducer; measuring a frequency of oscillation of the at least one electrical signal resulting from the stimulated resonant oscillation to obtain a measured resonance frequency of the piezoelectric transducer; and tuning a stopband frequency of a notch filter coupled to the piezoelectric transducer to match the measured resonance frequency of the piezoelectric transducer.

Abstract: An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Abstract: A dual-input, single-output low-dropout voltage regulator circuit includes: a first supply terminal, a second supply terminal and an output terminal, and first and second transistors having current paths coupled respectively between the first and second terminal and the output terminal. First and second drive circuit blocks are coupled respectively to the first and second supply terminals and drive the control terminals of the first and second transistors to provide a regulated voltage at the output terminal from the voltage on the first supply terminal and the second supply terminal. An input circuit block is sensitive to the voltage at the output terminal and is coupled to the first and second drive circuit blocks and configured to activate the second transistor to provide regulated voltage at the output terminal from the second terminal as a result of the voltage at the output terminal becoming lower than a desired value.

Abstract: A dual-input, single-output low-dropout voltage regulator circuit includes: a first supply terminal, a second supply terminal and an output terminal, and first and second transistors having current paths coupled respectively between the first and second terminal and the output terminal. First and second drive circuit blocks are coupled respectively to the first and second supply terminals and drive the control terminals of the first and second transistors to provide a regulated voltage at the output terminal from the voltage on the first supply terminal and the second supply terminal. An input circuit block is sensitive to the voltage at the output terminal and is coupled to the first and second drive circuit blocks and configured to activate the second transistor to provide regulated voltage at the output terminal from the second terminal as a result of the voltage at the output terminal becoming lower than a desired value.

Abstract: A programmable-gain amplifier includes: two complementary cross-coupled transistor pairs mutually coupled with each transistor in one pair having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair. First and second coupling points are formed between the pairs; with first and second sampling capacitors coupled thereto. First and second input stages have input terminals to input signals for sampling by the first and second sampling capacitors. Switching means couple the first and second input stages to the sampling capacitors so the input signals are sampled as sampled signals on the sampling capacitors. The switching means energizes the complementary cross-coupled transistor pairs so the signals sampled on the sampling capacitors undergo negative resistance regeneration growing exponentially over time to thereby provide an exponential amplifier gain.

Abstract: A programmable-gain amplifier includes: two complementary cross-coupled transistor pairs mutually coupled with each transistor in one pair having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair. First and second coupling points are formed between the pairs; with first and second sampling capacitors coupled thereto. First and second input stages have input terminals to input signals for sampling by the first and second sampling capacitors. Switching means couple the first and second input stages to the sampling capacitors so the input signals are sampled as sampled signals on the sampling capacitors. The switching means energizes the complementary cross-coupled transistor pairs so the signals sampled on the sampling capacitors undergo negative resistance regeneration growing exponentially over time to thereby provide an exponential amplifier gain.