Patents by Inventor Marco Troost

Marco Troost has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor component with ESD protection
    Patent number: 7250659
    Abstract: The semiconductor component has ESD protective elements configured outside the semiconductor body. The ESD protective elements connect an additional conductor track that carries a reference potential to conductor tracks of the leadframe. ESD protective structures integrated on the semiconductor body are no longer required. The correspondingly high area consumption is avoided.
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: July 31, 2007
    Assignee: Infineon Technologies AG
    Inventor: Marco Troost
  • Semiconductor component with ESD protection
    Publication number: 20040056339
    Abstract: The semiconductor component has ESD protective elements configured outside the semiconductor body. The ESD protective elements connect an additional conductor track that carries a reference potential to conductor tracks of the leadframe. ESD protective structures integrated on the semiconductor body are no longer required. The correspondingly high area consumption is avoided.
    Type: Application
    Filed: July 21, 2003
    Publication date: March 25, 2004
    Inventor: Marco Troost
  • Integrated semiconductor configuration having a semiconductor memory with user programmable bit width
    Patent number: 6603170
    Abstract: An integrated semiconductor circuit is described and has a semiconductor memory configuration embedded in a semiconductor chip and an interface circuit. The interface circuit is set up for the connection and transfer of data and control signals between the semiconductor memory configuration and a circuit periphery surrounding the memory configuration. The interface circuit is configured as a standard interface for all types of integrated semiconductor circuits with an embedded semiconductor memory configuration for the largest bit width that can be realized in the semiconductor memory configuration. A switch configuration is provided which switches off bits of the standard interface that are unused for smaller bit widths.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: August 5, 2003
    Assignee: Infineon Technologies AG
    Inventors: Andreas Bänisch, Marco Troost
  • Intergrated semiconductor circuit with a semiconductor memory configuration embedded in a semiconductor chip
    Publication number: 20020047167
    Abstract: An integrated semiconductor circuit is described and has a semiconductor memory configuration embedded in a semiconductor chip and an interface circuit. The interface circuit is set 5 up for the connection and transfer of data and control signals between the semiconductor memory configuration and a circuit periphery surrounding the memory configuration. The interface circuit is configured as a standard interface for all types of integrated semiconductor circuits with an embedded semiconductor memory configuration for the largest bit width that can be realized in the semiconductor memory configuration. A switch configuration is provided which switches off bits of the standard interface that are unused for smaller bit widths.
    Type: Application
    Filed: August 23, 2001
    Publication date: April 25, 2002
    Inventors: Andreas Banisch, Marco Troost