Patents by Inventor Marco Zamora

Marco Zamora has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085516
    Abstract: A real-time locating system having: at least one radio frequency tag (2) in a mobile element located in real time and at least one locating station (4) having: a processing and control unit (7); a plurality of transceivers (6); a plurality of antennas (5); means for determining a relative position of the antennas (5) and/or of the transceivers (6); and a synchronisation unit (8) configured to send one same clock signal to all the transceivers (6); the tag (2) is configured to periodically emit a presence signal associated with an identifier; the processing and control unit (7) calculates the position of the tag (2) reaches one or more transceivers (6), the values from the sensors (9) of the locating station (4) and/or the values from the sensors (9) of the tag (2) to estimate the current position of the tag (2).
    Type: Application
    Filed: January 18, 2021
    Publication date: March 14, 2024
    Inventors: Leticia ZAMORA CADENAS, Igone VELEZ ISASMENDI, Marcos LOSADA GOBANTES, Paul BUSTAMANTE MERINO
  • Patent number: 11009333
    Abstract: A taper gauge assembly includes a plurality of gauges that each has a flat side and a tapered side. Each of the gauges has ruler indicia printed thereon for indicating the width of the gauges along a full length of the gauges. A selected one of the gauges is insertable into a gap between a reference fixture and an assembled part in a manufacturing setting. Moreover, the selected gauge is inserted downwardly until the flat side abuts a perimeter edge of the reference fixture and the tapered side abuts a perimeter edge of the assembled part. Thus, the perimeter edge the reference fixture and the perimeter edge of the assembled part is aligned with a respective point along the ruler indicia. In this way an inspection distance is defined between the reference fixture and the assembled part for performing a quality inspection.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: May 18, 2021
    Inventor: Marco Zamora
  • Publication number: 20140021645
    Abstract: A method for constructing layers of polymers through a core of open cell porous material such as metal foams is provided comprising the use of temporary filler material to fill certain volumes within the cellular material. This is followed by filling the remaining volume with polymeric material. The temporary filler material is then removed revealing a layer of a composite of polymer and cellular material as well as a layer of unfilled cellular material. The process can then be repeated to create other layers using same or different polymer.
    Type: Application
    Filed: June 12, 2013
    Publication date: January 23, 2014
    Inventors: Nassif Elias Rayess, Marcos Zamora
  • Patent number: 6662133
    Abstract: Repairing arrays on a processor with an on chip built in self test engine on the processor is provided. A subset of the arrays is selected for testing. Data patterns are sent from the test engine to the subset of arrays at a plurality of operating parameters. A response is received at the test engine from the subset of arrays at the operating parameters. The received response is compared to an expected response using the test engine, wherein the processor controller determines if additional test failures were detected by the test engine for the subset of arrays with a plurality of JTAG based instructions. Code in the processor controller then determines the states that need to be scanned into the scannable latches to force the array control logic to choose additional spare wordlines and/or bitlines to repair the newly identified failures in addition to all previously defined repair actions.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: December 9, 2003
    Assignee: International Business Machines Corporation
    Inventors: Christopher John Engel, Norman Karl James, Brian Chan Monwai, Kevin F. Reick, Philip George Shephard, III, Marco Zamora
  • Publication number: 20020123854
    Abstract: Repairing a plurality arrays on a processor with an on chip built in self test engine on the processor is provided. A subset of the plurality of arrays is selected for testing. Data patterns are sent from the on chip built in self test engine to the subset of the plurality of arrays on the processor at a plurality of operating parameters. A response is received at the on chip built in self test engine from the subset of the plurality of arrays at the plurality of operating parameters. The response from the subset of the plurality of arrays is compared to an expected response using the on chip built in self test engine, wherein the processor controller determines if additional test failures were detected by the ABIST engine(s) for the subset of the plurality of arrays with a plurality of JTAG based instructions.
    Type: Application
    Filed: March 1, 2001
    Publication date: September 5, 2002
    Applicant: International Business Machines Corporation
    Inventors: Christopher John Engel, Norman Karl James, Brian Chan Monwai, Kevin F. Reick, Philip George Shephard, Marco Zamora