Patents by Inventor Marcos Augusto De Goes
Marcos Augusto De Goes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10936776Abstract: Various embodiments provide for analyzing (e.g., debugging) waveform data generated for a simulated circuit design, which can be used as part of electronic design automation (EDA). For example, where a user modifies a circuit design in a manner that impacts a next simulation run performed on the circuit design, various embodiments perform the next simulation run only on one or more portions of the circuit design affected by the user's modifications, while the results/simulated values for the rest of the circuit design are kept or reused.Type: GrantFiled: March 30, 2020Date of Patent: March 2, 2021Assignee: Cadence Design Systems, Inc.Inventors: Chien-Liang Lin, Thamara Karen Cunha Andrade, Ronalu Augusta Nunes Barcelos, Gabriel Peres Nobre, Igor Tiradentes Murta, Vitor Machado Guilherme Barros, Rafael Sales Medina Ferreira, Marcos Augusto de Goes
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Patent number: 10020848Abstract: The method of the present invention refers to digital link. The method (101) identifies the user interaction (103) with a specific object (100). According to this interaction, the method (101) identifies characteristics or data on the specific object (100) which allow the method (101) to extract personal information and associate it with an output message (for example, a predefined text, audio message to be recorded, etc.) that will be sent to the target contact/user (102) (which can be another person, a group of people, a system/service, or objects in general). Since the contact target (102) is identified, a smart device associated with the method (101) triggers a preset action for the connection with the contact target (102). The method (101) allows the reception of target responses contact (102) enabling the user (103) to maintain communication with the target user (102).Type: GrantFiled: May 27, 2016Date of Patent: July 10, 2018Assignee: SAMSUNG ELETRÔNICA DA AMAZÔNIA LTDA.Inventors: Marcelo Augusto Di Grandi Nery, Gustavo Kaneblai Martins Costa, Alexandre Barbosa Silveira, Rodrigo Jose Tobias, Renata Zilse Pereira Borges, Viviane Ortiz Franco, Paulo Victor Motta, Marcos Augusto De Goes, Leandro Dos Santos, Juliano Rodriguez Brianeze
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Publication number: 20160373165Abstract: The method of the present invention refers to digital link. The method (101) identifies the user interaction (103) with a specific object (100). According to this interaction, the method (101) identifies characteristics or data on the specific object (100) which allow the method (101) to extract personal information and associate it with an output message (for example, a predefined text, audio message to be recorded, etc.) that will be sent to the target contact/user (102) (which can be another person, a group of people, a system/service, or objects in general). Since the contact target (102) is identified, a smart device associated with the method (101) triggers a preset action for the connection with the contact target (102). The method (101) allows the reception of target responses contact (102) enabling the user (103) to maintain communication with the target user (102).Type: ApplicationFiled: May 27, 2016Publication date: December 22, 2016Applicant: SAMSUNG ELETRÔNICA DA AMAZÔNIA LTDA.Inventors: Marcelo AUGUSTO DI GRANDI NERY, GUSTAVO KANEBLAI MARTINS COSTA, ALEXANDRE BARBOSA SILVEIRA, RODRIGO JOSE TOBIAS, RENATA ZILSE PEREIRA BORGES, VIVIANE ORTIZ FRANCO, PAULO VICTOR MOTTA, MARCOS AUGUSTO DE GOES, LEANDRO DOS SANTOS, JULIANO RODRIGUEZ BRIANEZE
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Patent number: 8487884Abstract: A method includes driving a current through a touch screen that is based on contact of the touch screen, generating a proportional second current, and detecting contact of the touch screen from the second current. Another method includes providing a touch screen with parallel plates, disabling contact detection when a plate voltage is lower than a threshold voltage, and enabling contact detection when the plate voltage is at least equal to the threshold voltage. A device includes a first node and a second node coupled to a touch screen, a third node, a first current mirror coupled to the second node and the third node configured to generate a current at the third node that is proportional to a second current at the second node, and a detection circuit that provides a signal based on the first current that indicates contact of the touch screen.Type: GrantFiled: June 24, 2008Date of Patent: July 16, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Marcos Augusto De Goes, Alfredo Olmos, Stefano Pietri
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Publication number: 20090315835Abstract: A method includes driving a current through a touch screen that is based on contact of the touch screen, generating a proportional second current, and detecting contact of the touch screen from the second current. Another method includes providing a touch screen with parallel plates, disabling contact detection when a plate voltage is lower than a threshold voltage, and enabling contact detection when the plate voltage is at least equal to the threshold voltage. A device includes a first node and a second node coupled to a touch screen, a third node, a first current mirror coupled to the second node and the third node configured to generate a current at the third node that is proportional to a second current at the second node, and a detection circuit that provides a signal based on the first current that indicates contact of the touch screen.Type: ApplicationFiled: June 24, 2008Publication date: December 24, 2009Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Marcos Augusto De Goes, Alfredo Olmos, Stefano Pietri
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Patent number: 7602233Abstract: A multi-stage voltage multiplication circuit and methodology are provided which use a multi-stage charge pump boosting circuit (210) and two-stage pass gate circuit (220) having complementary power switches (M6, M9, M7, M10) to efficiently develop an output voltage (VOUT) that is higher than the input supply voltage (VDD). By using a two-stage complementary switch to connect boosted clock signals (P1, P2) from a charge pump (210) to the multiplier output (VOUT), return current from the storage capacitor (COUT) to the pumping capacitor (C1, C2) is blocked, thereby increasing power transfer efficiency, even at high clock frequencies. In addition, a boosted auxiliary voltage is generated by an additional boosting stage (230) and applied to the PMOS wells of the pass gate circuit (220), thereby preventing latch-up and backflow.Type: GrantFiled: February 29, 2008Date of Patent: October 13, 2009Assignee: Freescale Semiconductor, Inc.Inventors: Stefano Pietri, Marcos Augusto De Goes, Roberto Angelo Bertoli
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Publication number: 20090219077Abstract: A multi-stage voltage multiplication circuit and methodology are provided which use a multi-stage charge pump boosting circuit (210) and two-stage pass gate circuit (220) having complementary power switches (M6, M9, M7, M10) to efficiently develop an output voltage (VOUT) that is higher than the input supply voltage (VDD). By using a two-stage complementary switch to connect boosted clock signals (P1, P2) from a charge pump (210) to the multiplier output (VOUT), return current from the storage capacitor (COUT) to the pumping capacitor (C1, C2) is blocked, thereby increasing power transfer efficiency, even at high clock frequencies. In addition, a boosted auxiliary voltage is generated by an additional boosting stage (230) and applied to the PMOS wells of the pass gate circuit (220), thereby preventing latch-up and backflow.Type: ApplicationFiled: February 29, 2008Publication date: September 3, 2009Inventors: Stefano Pietri, Marcos Augusto De Goes, Roberto Angelo Bertoli