Patents by Inventor Marcos Carranza

Marcos Carranza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240273120
    Abstract: Systems, apparatuses and methods include technology that identifies first data that is autonomously generated, where the first data is associated with a first source. The technology may further determine that the first data is to be marked with an indication that the first data is associated with the first source, generate an identifier associated with the first data based on the first data being determined to be marked, where the identifier indicates that the first data is associated with the first source, and store the identifier to an entry in a storage that is remotely accessible.
    Type: Application
    Filed: March 14, 2024
    Publication date: August 15, 2024
    Inventors: Francesc Guim Bernat, Karthik Kumar, Akhilesh S. Thyagaturu, Marcos Carranza, Rajesh Poornachandran
  • Patent number: 12063280
    Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to obtain provenance metadata for a microservice from a local blockchain of provenance metadata maintained for the hardware resource executing a task performed by the microservice, the provenance metadata comprising identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and an operating state of a sidecar of the microservice during the task; access one or more policies established for the microservice; analyze the provenance metadata with respect to the one or more policies to identify if there is a violation of the one or more policies; and generate one or more evaluation metrics based on whether the violation of the one or more policies is identified.
    Type: Grant
    Filed: August 25, 2023
    Date of Patent: August 13, 2024
    Assignee: INTEL CORPORATION
    Inventors: Rajesh Poornachandran, Vincent Zimmer, Subrata Banik, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Publication number: 20240248965
    Abstract: Various examples relate to apparatuses, devices, methods, and non-transitory machine-readable storage media for presenting content and for a node of a blockchain network. An apparatus for presenting content is to obtain the content, obtain, from at least one decentralized application referenced by the content, at least one license for using the content, and present the content in accordance with the at least one license.
    Type: Application
    Filed: September 26, 2023
    Publication date: July 25, 2024
    Inventors: Rajesh POORNACHANDRAN, Marcos CARRANZA
  • Publication number: 20240249284
    Abstract: Various examples of the present disclosure relate to methods, apparatuses, devices, and computer programs for peers of a blockchain network. A method for distributing tasks to Web3 peers of a blockchain network comprises identifying, during execution of a smart contract, a plurality of tasks to be performed by one or more peers of the blockchain network, determining capabilities of the peers of the blockchain network, wherein at least one capability of at least one peer of the blockchain network is unlocked as an on-demand unlock of the capability at the respective peer, and distributing the plurality of tasks to the one or more peers based on the capabilities of the peers of the blockchain network.
    Type: Application
    Filed: September 29, 2023
    Publication date: July 25, 2024
    Inventors: Rajesh POORNACHANDRAN, Francesc GUIM BERNAT, Marcos CARRANZA, Cesar MARTINEZ-SPESSOT, Mario Jose DIVAN KOLLER
  • Publication number: 20240248633
    Abstract: Various examples of the present disclosure relate to apparatuses, devices, methods, and computer programs for providing and processing information characterizing a non-uniform memory architecture. An apparatus for a computer system comprises processing circuitry to determine a presence of one or more memory devices connected to at least one processor of the computer system via a serial communication-based processor-to-memory interface, the one or more memory devices being part of a non-uniform memory architecture used by the computer system, determine at least one characteristic for the one or more memory devices by estimating or measuring a performance of the one or more memory devices as observed by the at least one processor, and provide information on the at least one characteristic of the one or more memory devices as part of information characterizing the non-uniform memory architecture.
    Type: Application
    Filed: September 29, 2023
    Publication date: July 25, 2024
    Inventors: Francesc GUIM BERNAT, Karthik KUMAR, Marcos CARRANZA, Rajesh POORNACHANDRAN, Thomas WILLHALM
  • Patent number: 12047357
    Abstract: Embodiments described herein are generally directed to a transparent and adaptable mechanism for performing secure application communications through sidecars. In an example, a set of security features is discovered by a first sidecar of a first microservice of multiple microservices of an application. The set of security features are associated with a device of multiple devices of a set of one or more host systems on which the first microservice is running. Information regarding the set of discovered security features is made available to the other microservices by the first sidecar by sharing the information with a discovery service accessible to all of the microservices. A configuration of a communication channel through which a message is to be transmitted from a second microservice to the first microservice is determined by a second sidecar of the second microservice by issuing a request to the discovery service regarding the first microservice.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: July 23, 2024
    Assignee: Intel Corporation
    Inventors: Cesar Martinez-Spessot, Marcos Carranza, Lakshmi Talluru, Mateo Guzman, Francesc Guim Bernat, Karthik Kumar, Rajesh Poornachandran, Kshitij Arun Doshi
  • Publication number: 20240231924
    Abstract: It is provided an apparatus comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions. The machine-readable instructions comprise instructions to identify a processing flow pattern of a large language model, LLM, wherein the LLM is executed on a processor circuitry comprising a plurality of processor cores and wherein the processing flow pattern comprising a plurality of processing phases. The machine-readable instructions further comprise instructions to identify a processing phase of the LLM from the processing flow pattern. The machine-readable instructions further comprise instructions to allocate processing resources to the processor circuitry based on the identified processing phase of the LLM.
    Type: Application
    Filed: March 27, 2024
    Publication date: July 11, 2024
    Inventors: Sharanyan SRIKANTHAN, Karthik KUMAR, Francesc GUIM BERNAT, Rajesh POORNACHANDRAN, Marcos CARRANZA
  • Publication number: 20240193284
    Abstract: Techniques and mechanisms to allocate functionality of a chiplet for access by one or more processor cores which are coupled to remote processor via a network switch. In an embodiment, a composite chip communicates with the switch via a Compute Express Link (CXL) link. The switch receives capability information which identifies both a chiplet of the composite chip, and a functionality which is available from a resource of that chiplet. Based on the capability information, the switch provides an inventory of chiplet resources. In response to an allocation request, the switch accesses the inventory to identify whether a suitable chiplet resource is available. Based on the access, the switch configures a chip to enable an allocation of a chiplet resource. In another embodiment, the chiplet resource is allocated at a sub-processor level of granularity, and disables access to the chiplet resource by one or more local processor cores.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 13, 2024
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Marcos Carranza, Kshitij Doshi, Ned Smith, Karthik Kumar
  • Publication number: 20240111615
    Abstract: Embodiments described herein are generally directed to the use of sidecars to perform dynamic API contract generation and conversion. In an example, a first sidecar of a source microservice intercepts a first call to a first API exposed by a destination microservice. The first call makes use of a first API technology specified by a first contract and is originated by the source microservice. An API technology is selected from multiple API technologies. The selected API technology is determined to be different than the first API technology. Based on the first contract, a second contract is dynamically generated that specifies an intermediate API that makes use of the selected API technology. A second sidecar of the destination microservice is caused to generate the intermediate API and connect the intermediate API to the first API.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Marcos Carranza, Cesar Martinez-Spessot, Mateo Guzman, Francesc Guim Bernat, Karthik Kumar, Rajesh Poornachandran, Kshitij Arun Doshi
  • Patent number: 11880727
    Abstract: Embodiments described herein are generally directed to the use of sidecars to perform dynamic Application Programming Interface (API) contract generation and conversion. In an example, a first call by a first microservice to a first API of a second microservice is intercepted by a first sidecar of the first microservice. The first API is of a first API type of multiple API types and is specified by a first contract. An API type of the multiple API types is selected by the first sidecar. Responsive to determining the selected API type differs from the first API type, based on the first contract, a second contract is generated by the first sidecar specifying a second API of the selected API type; and a second sidecar of the second microservice is caused to generate the second API and internally connect the second API to the first API based on the second contract.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: January 23, 2024
    Assignee: Intel Corporation
    Inventors: Marcos Carranza, Cesar Martinez-Spessot, Mateo Guzman, Francesc Guim Bernat, Karthik Kumar, Rajesh Poornachandran, Kshitij Arun Doshi
  • Patent number: 11880287
    Abstract: Embodiments described herein are generally directed to intelligent management of microservices failover. In an example, responsive to an uncorrectable hardware error associated with a processing resource of a platform on which a task of a service is being performed by a primary microservice, a failover trigger is received by a failover service. A secondary microservice is identified by the failover service that is operating in lockstep mode with the primary microservice. The secondary microservice is caused by the failover service to takeover performance of the task in non-lockstep mode based on failover metadata persisted by the primary microservice. The primary microservice is caused by the failover service to be taken offline.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: January 23, 2024
    Assignee: Intel Corporation
    Inventors: Rajesh Poornachandran, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Publication number: 20240013181
    Abstract: Various examples relate to apparatuses, devices, methods and computer programs for a group leader and a group member of a group of nodes of a blockchain network. The apparatus for the group leader comprises interface circuitry, machine-readable instructions, and processor circuitry to execute the machine-readable instructions to manage a membership of nodes of the blockchain network in the group of nodes, perform or delegate blockchain-related computational activity on behalf of the group of nodes according to an energy criterion.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 11, 2024
    Inventors: Rajesh POORNACHANDRAN, Marcos CARRANZA, Mallikarjuna CHILAKALA, Francesc GUIM BERNAT, Karthik KUMAR
  • Patent number: 11870669
    Abstract: An apparatus to facilitate at-scale telemetry using interactive matrix for deterministic microservices performance is disclosed. The apparatus includes one or more processors to: receive user input comprising an objective or task corresponding to scheduling a microservice for a service, wherein the objective or task may include QoS, SLO, ML feedback; identify interaction matrix components in an interaction matrix that match the objective or tasks for the microservice; identify knowledgebase components in knowledgebase that match the objective or tasks for the microservice; and determine a scheduling operation for the microservice, the scheduling operation to deploy the microservice in a configuration that is in accordance with the objective or task, wherein the configuration comprises a set of hardware devices and microservice interaction points determined based on the interaction matrix components and the knowledgebase components.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: January 9, 2024
    Assignee: INTEL CORPORATION
    Inventors: Rajesh Poornachandran, Vincent Zimmer, Subrata Banik, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Publication number: 20240004709
    Abstract: Examples relate to a concept for software application container hardware resource allocation, and in particular to sidecar apparatuses, sidecar devices, methods for a software application container sidecars, a resource management controller apparatus, a resource management controller device, and corresponding computer programs and computer systems. A sidecar apparatus comprises interface circuitry, machine-readable instructions and processing circuitry to execute the machine-readable instructions to obtain information on hardware resources desired by a software application container from the software application container, and to provide a request for changing the hardware resources allocated to the software application container to another entity capable of influencing an allocation of hardware resources to the software application container.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventors: Rajesh POORNACHANDRAN, Kshitij A. DOSHI, Rita H. WOUHAYBI, Francesc GUIM BERNAT, Marcos CARRANZA
  • Publication number: 20230421374
    Abstract: Examples relate to a computer system, a telemetry hub apparatus, a telemetry hub device, a telemetry hub method, a microservice apparatus, a microservice device, a microservice method and to corresponding computer programs. The telemetry apparatus is configured to obtain telemetry information from a plurality of microservices, and to provide access to the telemetry information for the plurality of microservices according to an access scheme.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: Rajesh POORNACHANDRAN, Kshitij A. DOSHI, Rita H. WOUHAYBI, Francesc GUIM BERNAT, Karthik KUMAR, Marcos CARRANZA, Cesar MARTINEZ SPESSOT
  • Publication number: 20230412699
    Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to obtain provenance metadata for a microservice from a local blockchain of provenance metadata maintained for the hardware resource executing a task performed by the microservice, the provenance metadata comprising identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and an operating state of a sidecar of the microservice during the task; access one or more policies established for the microservice; analyze the provenance metadata with respect to the one or more policies to identify if there is a violation of the one or more policies; and generate one or more evaluation metrics based on whether the violation of the one or more policies is identified.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 21, 2023
    Applicant: Intel Corporation
    Inventors: Rajesh Poornachandran, Vincent Zimmer, Subrata Banik, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Publication number: 20230344864
    Abstract: Various examples relate to an apparatus, device, method, and a non-transitory machine-readable storage medium for a node of a blockchain network. The apparatus comprises interface circuitry, machine-readable instructions and processor circuitry to execute the machine-readable instructions to compare a traffic pattern of requests associated with one or more smart contracts hosted by the node of the blockchain network with a reference traffic pattern, determine an estimated denial of service of at least one of the one or more smart contracts based on the comparison between the traffic pattern and the reference traffic pattern, determine one or more potential mitigations for the estimated denial of service, and apply at least one of the one or more potential mitigations.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 26, 2023
    Inventors: Mario Jose DIVAN KOLLER, Marcos CARRANZA, Rajesh POORNACHANDRAN, Francesc GUIM BERNAT, Cesar MARTINEZ-SPESSOT
  • Patent number: 11792280
    Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to: obtain, by a microservice of a service hosted in a datacenter, provisioned credentials for the microservice based on an attestation protocol; generate, for a task performed by the microservice, provenance metadata for the task, the provenance metadata including identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and operating state of a sidecar of the microservice during the task; encrypt the provenance metadata with the provisioned credentials for the microservice; and record the encrypted provenance metadata in a local blockchain of provenance metadata maintained for the hardware resource executing the task and the microservice.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: October 17, 2023
    Assignee: INTEL CORPORATION
    Inventors: Rajesh Poornachandran, Vincent Zimmer, Subrata Banik, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Patent number: 11750472
    Abstract: An apparatus to facilitate telemetry targeted query injection for enhanced debugging in microservices architectures is disclosed. The apparatus includes one or more processors to: identify contextual trace of a previous query recorded in collected data of a service, where microservices of the service responded to the previous query; access an interdependency flow graph representing an architecture and interaction of microservices deployed for a service; retrieve, based on the interdependency flow graph, telemetry data of the microservices corresponding to the contextual trace; identify, based on the telemetry data, an activation profile corresponding to the previous query, the activation profile detailing a response of the microservices to the previous query; compare the activation profile to a correlation profile for the previous query to detect whether an anomaly occurred in the service in response to the previous query; and recommend a modified query based on detection of the anomaly.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: September 5, 2023
    Assignee: INTEL CORPORATION
    Inventors: Rajesh Poornachandran, Marcos Carranza
  • Publication number: 20230273597
    Abstract: Telemetry systems for monitoring cooling of compute components and related apparatus and methods are disclosed. An example apparatus includes interface circuitry, machine-readable instructions, and programmable circuitry to at least one of instantiate or execute the machine-readable instructions to generate a heatmap based on outputs of one or more sensors in an environment, the environment including a first compute device, the sensor outputs including a metric associated with a property of a coolant and a location of the sensor in the environment, identify a compute performance metric of the first compute device, determine a cooling parameter for the first compute device based on the heatmap and the compute performance metric, and cause a cooling distribution unit to control flow of the coolant in the environment based on the cooling parameter.
    Type: Application
    Filed: May 8, 2023
    Publication date: August 31, 2023
    Inventors: Francesc Guim Bernat, Amruta Misra, Kshitij Arun Doshi, John J. Browne, Marcos Carranza