Patents by Inventor Marcos M. Pelicia

Marcos M. Pelicia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9588531
    Abstract: Voltage regulator with extended minimum to maximum current ratio. In some embodiments, a low-dropout (LDO) voltage regulator disposed within a semiconductor package may include an inner loop; and an outer loop coupled to the inner loop, wherein: the inner loop is configured to control a load response of the LDO voltage regulator and to reduce at least one of: a printed circuit board (PCB) effect on the outer loop, a packaging effect on the outer loop, or a parasitic effect on the outer loop; the outer loop is configured to control a voltage at an output of the LDO voltage regulator; the output of the LDO voltage regulator is coupled to an integrated circuit within the semiconductor package; and the PCB, package, and parasitic effects comprise inductive or resistive effects caused by elements disposed outside of the semiconductor package.
    Type: Grant
    Filed: May 16, 2015
    Date of Patent: March 7, 2017
    Assignee: NXP USA, Inc.
    Inventors: Marcos M. Pelicia, Edevaldo Pereira Silva, Jr.
  • Publication number: 20160334819
    Abstract: Voltage regulator with extended minimum to maximum current ratio. In some embodiments, a low-dropout (LDO) voltage regulator disposed within a semiconductor package may include an inner loop; and an outer loop coupled to the inner loop, wherein: the inner loop is configured to control a load response of the LDO voltage regulator and to reduce at least one of: a printed circuit board (PCB) effect on the outer loop, a packaging effect on the outer loop, or a parasitic effect on the outer loop; the outer loop is configured to control a voltage at an output of the LDO voltage regulator; the output of the LDO voltage regulator is coupled to an integrated circuit within the semiconductor package; and the PCB, package, and parasitic effects comprise inductive or resistive effects caused by elements disposed outside of the semiconductor package.
    Type: Application
    Filed: May 16, 2015
    Publication date: November 17, 2016
    Inventors: Marcos M. Pelicia, Edevaldo Pereira Silva, JR.