Abstract: The present disclosure relates to a signal processing circuit, comprising: at least one divider configured to receive an input clock signal with a first frequency and to generate an output clock signal with a second frequency which is a fraction of the first frequency; a reference signal unit configured to generate or to receive a phase reference signal; and at least one phase detector configured to detect a phase offset between the output clock signal and the phase reference signal; wherein the at least one divider is configured to shift a phase of its output clock signal in order to adapt the phase offset between its output clock signal and the phase reference signal.

Abstract: A multipath D/A converter is provided and has input terminals for a first and a second digital signal, and a signal combination unit D/A converting the digital signals supplied to the input terminals, and combining the generated analog signals. The signal combination unit includes a clock signal with a period having a first half period and a second half period. The signal combination unit combines the analog first and second signals by aggregating them with respective weighting coefficients. The signal combination unit has an output terminal for issuing an analog signal based on the aggregation. The signal combination unit applies a first set of weighting coefficients during the first half period of each period and a second set of weighting coefficients during said second half period of each period. The first set of weighting coefficients differs from the second set of weighting coefficients in at least one coefficient.

Abstract: A Multipath D/A converter device is proposed having input terminals for a least a first and a second digital signal path, in at least one of the at least one first and second signal path, means for inverting every second sample of the digital signal, and each signal path comprising a D/A converter. The D/A converter of all signal paths are designed to operate at the same phase. The multipath converter device includes an analog combining unit designed for combining the analog signals output by each of the D/A converter.

Abstract: A multipath D/A converter is provided and has input terminals for a first and a second digital signal, and a signal combination unit D/A converting the digital signals supplied to the input terminals, and combining the generated analog signals. The signal combination unit includes a clock signal with a period having a first half period and a second half period. The signal combination unit combines the analog first and second signals by aggregating them with respective weighting coefficients. The signal combination unit has an output terminal for issuing an analog signal based on the aggregation. The signal combination unit applies a first set of weighting coefficients during the first half period of each period and a second set of weighting coefficients during said second half period of each period. The first set of weighting coefficients differs from the second set of weighting coefficients in at least one coefficient.

Abstract: A Multipath D/A converter device is proposed having input terminals for a least a first and a second digital signal path, in at least one of the at least one first and second signal path, means for inverting every second sample of the digital signal, and each signal path comprising a D/A converter. The D/A converter of all signal paths are designed to operate at the same phase. The multipath converter device includes an analog combining unit designed for combining the analog signals output by each of the D/A converter.

Abstract: A calibration system including a signal generator device, at least one calibration receiver and a processing circuit is described. The signal generator device has a signal generation circuit configured to generate a signal, at least one signal path terminating at a signal output port of the signal generator device, and at least one tap provided in the signal path. The at least one calibration receiver is connected with the at least one tap in the signal path. The at least one calibration receiver is connected with the processing circuit. The processing circuit is configured to receive measurement results obtained by the at least one calibration receiver and to analyze the measurement results received, thereby determining analysis results.

Abstract: A calibration system including a signal generator device, at least one calibration receiver and a processing circuit is described. The signal generator device has a signal generation circuit configured to generate a signal, at least one signal path terminating at a signal output port of the signal generator device, and at least one tap provided in the signal path. The at least one calibration receiver is connected with the at least one tap in the signal path. The at least one calibration receiver is connected with the processing circuit. The processing circuit is configured to receive measurement results obtained by the at least one calibration receiver and to analyze the measurement results received, thereby determining analysis results.