Patents by Inventor Marcus E. Interrante
Marcus E. Interrante has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11164804Abstract: An IC device package includes a carrier, one or more IC devices and a lid. The lid includes a lid-ridge. The lid is connected to the carrier by connecting the lid-ridge to the carrier with first nano particle metallic paste, prior to connecting the IC device to the carrier. Subsequent to connecting the IC device to the carrier, the lid is connected to the lid-ridge with second nano particle metallic paste. The nano particle metallic paste may be sintered to form a metallic connection. In multi-IC device packages, the lid-ridge may be positioned between the lid and the carrier and between the IC devices.Type: GrantFiled: July 23, 2019Date of Patent: November 2, 2021Assignee: International Business Machines CorporationInventors: Charles L. Arvin, Kevin Drummond, Luca Del Carro, Thomas Brunschwiler, Stephanie Allard, Kenneth C. Marston, Marcus E. Interrante
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Patent number: 10978314Abstract: A multi integrated circuit (IC) chip package includes multiple IC chips, a carrier, and a lid. The IC chips may be connected to the carrier. Alternatively, each IC chip may be connected to an interposer and multiple interposers may be connected to the carrier. The carrier may be positioned against a carrier deck. The lid may be positioned relative to carrier by aligning one or more alignment features within the lid with one or more respective alignment features of the carrier deck. A compression fixture cover may contact the lid and exert a force toward the carrier deck, the lid be loaded against respective IC chips, and the lid may be loaded against the carrier. While under compression, thermal interface material between respective the lid and respective IC chips and seal band material between the lid and the carrier may be cured.Type: GrantFiled: October 3, 2019Date of Patent: April 13, 2021Assignee: International Business Machines CorporationInventors: Marcus E. Interrante, Kathryn R. Lange, Kamal K. Sikka, Tuhin Sinha, Hilton T. Toy, Jeffrey A. Zitz
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Publication number: 20210028079Abstract: An IC device package includes a carrier, one or more IC devices and a lid. The lid includes a lid-ridge. The lid is connected to the carrier by connecting the lid-ridge to the carrier with first nano particle metallic paste, prior to connecting the IC device to the carrier. Subsequent to connecting the IC device to the carrier, the lid is connected to the lid-ridge with second nano particle metallic paste. The nano particle metallic paste may be sintered to form a metallic connection. In multi-IC device packages, the lid-ridge may be positioned between the lid and the carrier and between the IC devices.Type: ApplicationFiled: July 23, 2019Publication date: January 28, 2021Inventors: Charles L. Arvin, Kevin Drummond, Luca Del Carro, Thomas Brunschwiler, Stephanie Allard, Kenneth C. Marston, Marcus E. Interrante
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Patent number: 10832987Abstract: A method of managing thermal warpage of a laminate which includes: assembling a stiffener and an adhesive on the laminate, the stiffener being a material that has a higher modulus of elasticity than the laminate; applying a force to deform the laminate a predetermined amount; heating the laminate, stiffener and adhesive to a predetermined temperature at which the adhesive cures to bond the stiffener to the laminate; cooling the laminate, stiffener and adhesive to a temperature below the predetermined temperature, the laminate maintaining its deformed shape.Type: GrantFiled: March 24, 2018Date of Patent: November 10, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles L. Arvin, Marcus E. Interrante, Thomas E. Lombardi, Hilton T. Toy, Krishna R. Tunga, Thomas Weiss
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Patent number: 10804181Abstract: Embodiments of the present invention relate to an heterogenous thermal interface material (TIM). The heterogenous TIM includes two or more different materials. One material has a low elastic modulus, also known as Young's modulus, and is utilized primarily to transfer heat from one component to another component. Another material has a higher elastic modulus and is primarily utilized to bond or connect the corners and/or edges of one component to the other component. The high elastic modulus material is generally located within the heterogenous TIM where TIM strain is or is expected to be high. For example, the high elastic modulus material may be located at the corner and/or edge regions of the heterogenous TIM.Type: GrantFiled: March 12, 2019Date of Patent: October 13, 2020Assignee: International Business Machines CorporationInventors: Marcus E. Interrante, Sushumna Iruvanti, Shidong Li, Tuhin Sinha
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Publication number: 20200294880Abstract: Embodiments of the present invention relate to an heterogenous thermal interface material (TIM). The heterogenous TIM includes two or more different materials. One material has a low elastic modulus, also known as Young's modulus, and is utilized primarily to transfer heat from one component to another component. Another material has a higher elastic modulus and is primarily utilized to bond or connect the corners and/or edges of one component to the other component. The high elastic modulus material is generally located within the heterogenous TIM where TIM strain is or is expected to be high. For example, the high elastic modulus material may be located at the corner and/or edge regions of the heterogenous TIM.Type: ApplicationFiled: March 12, 2019Publication date: September 17, 2020Inventors: Marcus E. Interrante, Sushumna Iruvanti, Shidong Li, Tuhin Sinha
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Publication number: 20200135495Abstract: A multi integrated circuit (IC) chip package includes multiple IC chips, a carrier, and a lid. The IC chips may be connected to the carrier. Alternatively, each IC chip may be connected to an interposer and multiple interposers may be connected to the carrier. The carrier may be positioned against a carrier deck. The lid may be positioned relative to carrier by aligning one or more alignment features within the lid with one or more respective alignment features of the carrier deck. A compression fixture cover may contact the lid and exert a force toward the carrier deck, the lid be loaded against respective IC chips, and the lid may be loaded against the carrier. While under compression, thermal interface material between respective the lid and respective IC chips and seal band material between the lid and the carrier may be cured.Type: ApplicationFiled: October 3, 2019Publication date: April 30, 2020Inventors: Marcus E. Interrante, Kathryn R. Lange, Kamal K. Sikka, Tuhin Sinha, Hilton T. Toy, Jeffrey A. Zitz
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Patent number: 10541156Abstract: A multi integrated circuit (IC) chip package includes multiple IC chips, a carrier, and a lid. The IC chips may be connected to the carrier. Alternatively, each IC chip may be connected to an interposer and multiple interposers may be connected to the carrier. The carrier may be positioned within a carrier deck. The lid may be positioned relative to carrier by aligning one or more alignment receptacles within the lid with one or more respective alignment protrusions of the carrier deck. A compression fixture cover may contact the lid and exert a force toward the carrier deck, respective lid pedestals may be loaded toward respective IC chips, and an integral lid foot may be loaded toward the carrier. While under compression, thermal interface material between respective lid pedestals and respective IC chips and seal band material between the integral foot and the carrier may be cured.Type: GrantFiled: October 31, 2018Date of Patent: January 21, 2020Assignee: International Business Machines CorporationInventors: Marcus E. Interrante, Kathryn R. Lange, Kamal K. Sikka, Tuhin Sinha, Hilton T. Toy, Jeffrey A. Zitz
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Publication number: 20190295921Abstract: A method of managing thermal warpage of a laminate which includes: assembling a stiffener and an adhesive on the laminate, the stiffener being a material that has a higher modulus of elasticity than the laminate; applying a force to deform the laminate a predetermined amount; heating the laminate, stiffener and adhesive to a predetermined temperature at which the adhesive cures to bond the stiffener to the laminate; cooling the laminate, stiffener and adhesive to a temperature below the predetermined temperature, the laminate maintaining its deformed shape.Type: ApplicationFiled: March 24, 2018Publication date: September 26, 2019Inventors: Charles L. Arvin, Marcus E. Interrante, Thomas E. Lombardi, Hilton T. Toy, Krishna R. Tunga, Thomas Weiss
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Patent number: 9583408Abstract: Methods and apparatuses for reducing directional stress in an orthotropic encapsulation member of an electronic package may include attaching a stiffening frame to a carrier, the stiffening frame comprising a central opening to accept a semiconductor chip and a plurality of opposing sidewalls, electronically coupling the semiconductor chip to the carrier concentrically arranged within the central opening, and thermally contacting a directional heat spreader to the semiconductor chip, the directional heat spreader transferring heat from the semiconductor chip, wherein the directional heat spreader is shaped to reduce a directional stress along the opposing bivector direction.Type: GrantFiled: August 21, 2015Date of Patent: February 28, 2017Assignee: International Business Machines CorporationInventors: Marcus E. Interrante, Yi Pan, Hilton T. Toy, Jeffrey A. Zitz
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Publication number: 20170053845Abstract: Methods and apparatuses for reducing directional stress in an orthotropic encapsulation member of an electronic package may include attaching a stiffening frame to a carrier, the stiffening frame comprising a central opening to accept a semiconductor chip and a plurality of opposing sidewalls, electronically coupling the semiconductor chip to the carrier concentrically arranged within the central opening, and thermally contacting a directional heat spreader to the semiconductor chip, the directional heat spreader transferring heat from the semiconductor chip, wherein the directional heat spreader is shaped to reduce a directional stress along the opposing bivector direction.Type: ApplicationFiled: August 21, 2015Publication date: February 23, 2017Inventors: Marcus E. INTERRANTE, Yi PAN, Hilton T. TOY, Jeffrey A. ZITZ
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Patent number: 9401315Abstract: A semiconductor device package which includes a semiconductor package, a semiconductor device joined to the semiconductor package; and a lid to be placed over the semiconductor device and joined to the semiconductor package. The lid includes: a block of a first material having a first surface and a second surface, the second surface facing the semiconductor device, the block having perforations extending between the first surface and the second surface; inserts for filling the perforations, each of the inserts being made of a second material, at least one of the inserts protrudes beyond the second surface towards the semiconductor device; and a bonding material to bond the inserts to the block so that the at least one of the inserts protrudes beyond the second surface towards the semiconductor device. Also included is a method of assembling a semiconductor device package.Type: GrantFiled: March 26, 2015Date of Patent: July 26, 2016Assignee: GLOBALFOUNDRIES Inc.Inventors: Paul F. Bodenweber, Taryn J. Davis, Marcus E. Interrante, Chenzhou Lian, Kenneth C. Marston, Kathryn C. Rivera, Kamal K. Sikka, Hilton T. Toy
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Patent number: 9293439Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.Type: GrantFiled: December 11, 2014Date of Patent: March 22, 2016Assignee: GLOBALFOUNDRIES Inc.Inventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
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Patent number: 9224712Abstract: An interposer structure containing a first set of solder balls is placed in proximity to a vacuum distribution plate which has a planar contact surface and a plurality of openings located therein. A vacuum is then applied through the openings within the vacuum distribution plate such that the first set of solder balls are suspended within the plurality of openings and the interposer structure conforms to the planar contact surface of the vacuum distribution plate. A semiconductor chip containing a second set of solder balls is tacked to a surface of the interposer structure. A substrate is then brought into contact with a surface of the interposer structure containing the first set of solder balls, and then a solder reflow and underfill processes can be performed. Warping of the interposer structure is substantially eliminated using the vacuum distribution plate mentioned above.Type: GrantFiled: February 11, 2014Date of Patent: December 29, 2015Assignee: International Business Machines CorporationInventors: Marcus E. Interrante, Mario J. Interrante, Katsuyuki Sakuma
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Publication number: 20150228614Abstract: An interposer structure containing a first set of solder balls is placed in proximity to a vacuum distribution plate which has a planar contact surface and a plurality of openings located therein. A vacuum is then applied through the openings within the vacuum distribution plate such that the first set of solder balls are suspended within the plurality of openings and the interposer structure conforms to the planar contact surface of the vacuum distribution plate. A semiconductor chip containing a second set of solder balls is tacked to a surface of the interposer structure. A substrate is then brought into contact with a surface of the interposer structure containing the first set of solder balls, and then a solder reflow and underfill processes can be performed. Warping of the interposer structure is substantially eliminated using the vacuum distribution plate mentioned above.Type: ApplicationFiled: February 11, 2014Publication date: August 13, 2015Applicant: International Business Machines CorporationInventors: MARCUS E INTERRANTE, Mario J. Interrante, Katsuyuki Sakuma
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Patent number: 9093563Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.Type: GrantFiled: July 11, 2013Date of Patent: July 28, 2015Assignee: International Business Machines CorporationInventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
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Publication number: 20150093859Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.Type: ApplicationFiled: December 11, 2014Publication date: April 2, 2015Applicant: International Business Machines CorporationInventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
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Publication number: 20150014836Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.Type: ApplicationFiled: July 11, 2013Publication date: January 15, 2015Inventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
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Patent number: 8444043Abstract: An array of solder balls is attached to solder pads of one of a first substrate and a second substrate. After aligning the array of solder balls relative to solder pads of the other of the first substrate and the second substrate, a thermal-mass-increasing fixture is placed on a surface of the second substrate to form an assembly of the first substrate, the second substrate, and the array of the solder balls therebetween, and the thermal-mass-increasing fixture. The thermal-mass-increasing fixture is in physical contact with at least a surface of a periphery of the second substrate. The thermal-mass-increasing fixture reduces the cool-down rate of peripheral solder balls after a reflow step, thereby increasing time for deformation of peripheral solder balls during the cool-down and reducing the mechanical stress on the solder balls after the cool-down.Type: GrantFiled: January 31, 2012Date of Patent: May 21, 2013Assignee: International Business Machines CorporationInventors: William E. Bernier, Marcus E. Interrante, Rajneesh Kumar, Chenzhou Lian, Janak G. Patel, Peter Slota, Jr.