Patents by Inventor Marcus Grindstaff

Marcus Grindstaff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low power display refresh
    Patent number: 7734943
    Abstract: An application processor coupled to a Static Random Access Memory (SRAM) interfaces with a graphics accelerator. A Dynamic Random Access Memory (DRAM) stores frame buffer data that may be transferred to a display through a switch located on the graphics accelerator in normal operation. In a power savings mode, the DRAM may be powered down and a copied frame buffer data stored in the SRAM may be transferred to the display through the switch.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: June 8, 2010
    Assignee: Intel Corporation
    Inventors: Rochelle J. Whelan, Marcus Grindstaff
  • System with local unified memory architecture and method
    Patent number: 7106339
    Abstract: Local memory associated with one or more companion devices within a system is mapped into a system memory for use by an application processor.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: September 12, 2006
    Assignee: Intel Corporation
    Inventors: Marcus Grindstaff, Jeremy Burr
  • Accelerated dual-display
    Publication number: 20050134569
    Abstract: An accelerated dual display enabling a user to dynamically decide which graphics subsystem will run which display on a handheld device. The dual display system has an application processor and an external chip. A crossbar located in the external chip connects the application processor to the external chip. Displays are connected to the crossbar.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Inventors: Marcus Grindstaff, Lawrence Booth
  • Low power display refresh
    Publication number: 20040199798
    Abstract: An application processor coupled to a Static Random Access Memory (SRAM) interfaces with a graphics accelerator. A Dynamic Random Access Memory (DRAM) stores frame buffer data that may be transferred to a display through a switch located on the graphics accelerator in normal operation. In a power savings mode, the DRAM may be powered down and a copied frame buffer data stored in the SRAM may be transferred to the display through the switch.
    Type: Application
    Filed: April 3, 2003
    Publication date: October 7, 2004
    Inventors: Rochelle J. Whelan, Marcus Grindstaff
  • Multiplexing digital video out on an accelerated graphics port interface
    Patent number: 6724389
    Abstract: The present invention is a method and apparatus to map first graphics pins into second graphics pins. A first plurality of data and command pins corresponding to data and command signals in a first graphics mode is mapped into a second plurality of data and command pins corresponding to data and command signals in a second graphics mode. The first and second graphics modes are supported by a first chipset. The second graphics mode is supported by a second chipset. A detector pin strappable to a logic level to indicate an external graphics card is used in the first graphics mode is mapped into a first pin corresponding to a first signal of the second graphics mode. The first signal is ignored by the second chipset during initialization.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: April 20, 2004
    Assignee: Intel Corporation
    Inventors: Adam H. Wilen, Marcus Grindstaff, Aditya Sreenivas