Abstract: A method is described for forming gate structures with different metals on a single substrate. A thin semiconductor cap (26) is formed over gate dielectric (24) and patterned to be present in a first region (16) not a second region (18). Then, metal (30) and a second cap (34) is deposited and patterned to be present in the second region not the first. A thick selectively etchable layer for example of SIGe is deposited, the gates are patterned in both first and second regions, and the selectively etchable layer is removed. A metal layer is deposited and reacted with the first and second caps to form fully suicided or fully germanided layers.

Abstract: The invention relates to a method of manufacturing a semiconductor device (10) comprising a semiconductor body (2) provided with a field effect transistor (3), wherein a polycrystalline silicon region (5) with a metal layer (6) deposited thereon is transformed into a metal suicide gate electrode (3D) so as to form the gate electrode (3D), whereupon the part of the metal layer (6) that remains after this reaction is removed by etching. According to the invention, the semiconductor body (2) is exposed in a thermal treatment to an atmosphere comprising an oxygen-containing compound before or during the formation of the metal suicide (3D) gate electrode. In this way a transistor (3) comprising a gate electrode (3D) having a low resistance is obtained. The invention is particularly suitable for the manufacture of a PMOST, with Platinum or Palladium being used as the metal layer.

Abstract: A method for manufacturing a MOSFET device with a fully silicided (FUSI) gate is described. This method may be used to prevent formation of shorts between the FUSI gate and a contact to a source and/or a drain region. In particular, the method discloses the formation of an expansion volume above a gate dielectric. The volume is designed to substantially contain the fully silicided gate.

Abstract: A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.

Abstract: This invention relates to a semiconductor device (105) and a method of manufacturing this device. A preferred embodiment of the invention is a semiconductor device (105) comprising a silicon semiconductor substrate (110), an oxide layer (115) and an active layer (120). In the active layer, insulating areas (125) and an active area (127) have been formed. The active area (127) comprises a source (180), a drain (182) and a body (168). The source (180) and drain (182) also comprise source and drain extensions (184, 186). The active layer (120) is provided with a gate (170). On both sides of the gate (170), L-shaped side wall spacers are located. The source (180) and drain (182) also comprise silicide regions (190, 192). A characteristic of these regions is that they have extensions (194, 196) located under the side wall spacers (136, 138).

Abstract: A semiconductor device, fabricated by a method, having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate is disclosed. In one embodiment, the method includes i) forming, at least at the silicon region, a metal cluster layer from a first metal, such that, in the metal cluster layer, metal clusters alternate with sites where there are no metal clusters, the first metal being a non-siliciding metal at predetermined conditions, ii) depositing a metal layer of a second metal on top of the metal cluster layer, the second metal being a siliciding metal and iii) carrying out at least one heat treatment at the predetermined conditions on the second metal layer so as to form metal silicide through reaction of the second metal with the silicon region, wherein atoms of the first metal are displaced in a direction substantially perpendicular to the surface of the substrate.

Abstract: The invention relates to a method for fabricating a semiconductor device having a semiconductor body that comprises a first semiconductor structure having a dielectric layer and a first conductor, and a second semiconductor structure having a dielectric layer and a second conductor, that part of the first conductor which adjoins the dielectric layer having a work function different from the work function of the corresponding part of the second conductor. In one embodiment of the invention, after the dielectric layer has been applied to the semiconductor body, a metal layer is applied to the said dielectric layer, and then a silicon layer is deposited on the metal layer and is brought into reaction with the metal layer at the location of the first semiconductor structure, forming a metal silicide.

Abstract: One embodiment of the invention relates to a method for fabricating a semiconductor device having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate. The method comprises forming a metal cluster layer from a first, non-siliciding metal, followed by the deposition of a metal layer consisting of a second, siliciding metal. A subsequent heat treatment is responsible for forming a metal silicide from the second metal, the atoms of the first metal being displaced in a direction substantially perpendicular to the surface of the substrate. According to one embodiment of the invention, the atoms of the first metal are displaced by the Kirkendall effect to beneath the metal silicide. If an MOST, for example, is being fabricated, this has advantages both at the location of the source and drain region and at the location of the gate electrode.