Abstract: A real time clock (RTC) voltage regulator, a method of regulating an RTC voltage and a power management integrated circuit (PMIC). In one embodiment, an RTC voltage regulator includes a current source configured to provide a first current and a voltage regulator having a common gate amplifier and a power device. The first current is employed to establish a reference voltage for the common gate amplifier and the common gate amplifier is configured to control the power device. The power device is configured to provide an RTC voltage for the common gate amplifier.

Abstract: A real time clock (RTC) voltage regulator, a method of regulating an RTC voltage and a power management integrated circuit (PMIC). In one embodiment, an RTC voltage regulator includes a current source configured to provide a first current and a voltage regulator having a common gate amplifier and a power device. The first current is employed to establish a reference voltage for the common gate amplifier and the common gate amplifier is configured to control the power device. The power device is configured to provide an RTC voltage for the common gate amplifier.

Abstract: A low drop-out voltage regulator having soft-start. A low drop-out regulator circuit is provided having an input node, an output node, a power FET connected by a source and drain between the input node and the output node, and a feedback circuit having an output connected and providing a control signal to a gate of the power FET. A current limit circuit is configured to control the power FET to limit the current through it when the voltage across a controllable sense resistor connected to conduct a current representing the current through the power FET exceeds a predetermined limit value. At start-up, control unit provides a control signal to the controllable resistor to cause the resistance value of the controllable resistor to decrease incrementally in value at respective predetermined incremental times during a predetermined time interval.

Abstract: A low drop-out voltage regulator having soft-start. A low drop-out regulator circuit is provided having an input node, an output node, a power FET connected by a source and drain between the input node and the output node, and a feedback circuit having an output connected and providing a control signal to a gate of the power FET. A current limit circuit is configured to control the power FET to limit the current through it when the voltage across a controllable sense resistor connected to conduct a current representing the current through the power FET exceeds a predetermined limit value. At start-up, control unit provides a control signal to the controllable resistor to cause the resistance value of the controllable resistor to decrease incrementally in value at respective predetermined incremental times during a predetermined time interval.

Abstract: A dual-stage DAC system is provided that includes a coarse resistor network having a first portion and a second portion that provide a plurality of segment voltages. The coarse resistor network is coupled to a fine resistor network that provides a plurality of tap output voltages corresponding to a selected segment voltage. The output of the fine resistor network can be provided to an amplifier that sets a reference voltage in addition to buffering the output of the fine resistor network. A predetermined current is coupled to one of the first portion and the second portion of the coarse resistor network based on the segment voltage selected.

Abstract: The present invention relates to a trimmable oscillator circuit which comprises a comparator circuit operable to compare an output voltage of the oscillator circuit to a reference voltage and output a control signal in response thereto. The oscillator circuit further comprises an output capacitor, wherein a voltage at a node of the capacitor comprises the output voltage of the oscillator circuit, and the oscillator circuit also comprises a selectively trimmable charge/discharge circuit coupled between the comparator circuit and the output capacitor. The charge/discharge circuit is operable to charge or discharge the output capacitor based on the control signal, wherein a rate of charge or discharge is dictated by one or more user selectable control signals. Thus an oscillation frequency of the oscillator circuit may be trimmed.

Abstract: The invention provides apparatus, methods and systems for providing voltage protection at the drain-to-source path of an output transistor. The invention discloses circuit apparatus and system giving excess voltage protection in a circuit having a voltage swing up to approximately twice the voltage capacity of a circuit output transistor. Methods of the invention disclose maintaining the source-to-drain voltage of a protection transistor coupled to the circuit output transistor below its maximum value, while also maintaining the protection transistor gate-to-source voltage below its maximum value. The drain-to-source voltage of the circuit output transistor is guarded from exceeding its maximum acceptable drain-to-source voltage value by the protection transistor. Also disclosed are methods of selecting a protection transistor and related components such that the bias of the protection transistor is adjusted in response to the circuit output.

Abstract: The present invention relates to a trimmable oscillator circuit which comprises a comparator circuit operable to compare an output voltage of the oscillator circuit to a reference voltage and output a control signal in response thereto. The oscillator circuit further comprises an output capacitor, wherein a voltage at a node of the capacitor comprises the output voltage of the oscillator circuit, and the oscillator circuit also comprises a selectively trimmable charge/discharge circuit coupled between the comparator circuit and the output capacitor. The charge/discharge circuit is operable to charge or discharge the output capacitor based on the control signal, wherein a rate of charge or discharge is dictated by one or more user selectable control signals. Thus an oscillation frequency of the oscillator circuit may be trimmed.

Abstract: A circuit (41) to provide drive voltages to a voice coil motor (VCM) (50) of a hard disk drive (10) has identical high and low side drivers (42, 44, 46, and 48) connected to the VCM (50). Each driver has an output FET (52) selectively connecting the VCM (50) to a control voltage (58). A Class-AB output pair (54 and 54′) in parallel with the output FETs (52 and 52′) provides continuous and linear Class-AB operation at the output node (60) around the crossover point, while the output FETs (52 and 52′) are kept not conducting. This approach offers extremely low level of crossover harmonic distortion. Each FET of the Class-AB pair (54 and 54′) is connected to a biasing FET (56 and 56′) to provide the desired Class-AB quiescent current. Preferably the output FET (52), quiescent current controlling FET (54), and biasing FET (56) are fully integrated.

Abstract: An electric motor (12) has multiple phase inputs (22, 24, 26). Each phase input can be coupled to a supply voltage (VM) by a high side driver transistor (40, 46, 52), or can be coupled to ground by a low side driver transistor (42, 48 54). A control circuit (30) turns each of the high and low side driver transistors on and off according to a predetermined sequence. As each of the low side driver transistors is turned off, another low side driver transistor is turned on in a manner so that a current through the low side driver transistor which is being turned off decreases at a linear rate, and so that a current through the low side driver transistor which is being turned on simultaneously increases at the same linear rate.

Abstract: An apparatus for controlling an actuator having a moveable member and having a coil that influences movement of the member, by provision of a drive current to the coil in response to a target speed voltage signal. The invention includes an up/down counter, counting at a predetermined count rate and providing a count output. A control unit is provided for controlling the direction of count of the up/down counter depending on whether the voltage across the coil, sensed periodically a first predetermined interval after the drive current to the coil is interrupted, is greater than, or less than, a reference voltage having a predetermined relationship to the target speed voltage. A digital-to-analog converter is provided, responsive to the count output to provide a compensated voltage signal having a voltage corresponding to the count output.