Abstract: A fault reaction handling time interval (FRTI) for a reaction to the fault is determined based on a domain identifier (DID) indicative of an application associated with a fault. A first reaction to recover from the fault is signaled and then a determination is made whether a safe state is reached after the FRTI. Based on the safe state not being reached, a second FRTI is determined for a second escalated reaction, the second FRTI also being based on the DID. Typically, the second reaction results in less system availability so by defining the FRTI based on the DID sufficient time is allowed for reaching a safe state before the reaction is escalated.

Abstract: A glass roof assembly for a motor vehicle has a glass roof (30). A fastening element (32) made of plastic is connected fixedly on an edge region of the glass roof (30), and a body structure (12) of the vehicle has a fastening flange (20) for fastening the glass roof (30). The glass roof (30) is connected fixedly to the fastening flange (20) via the fastening element (32). A reinforcing element (34) made of plastic is integrated into the fastening element (32) and extends along the fastening flange (32) in the longitudinal direction of the vehicle and/or in the transverse direction of the vehicle. The reinforcing element (34) has, at least in sections, higher strength than the fastening element (32).

Abstract: An embedded information system includes a load control circuit coupleable to an external memory that contains instructions and constant data (organized by variable sized load units, LUs, and where at least one property of a LU is specified within metadata) associated with application code of a software application, at least one processor configured to execute the at least one application code; an internal memory configured as main system memory in a first part and as a cache for storing the instructions and constant data for an execution of the at least one application code from the external memory in a second part. The load control circuit is configured to load the LUs associated with the at least one application code from the external memory with a granularity of a single LU into the internal memory.

Abstract: A method of managing load units of executable instructions between internal memory in a microcontroller with multiple bus masters, and a non-volatile memory device external to the microcontroller. A copy of the load units are loaded from the external memory device into the internal memory for use by corresponding bus masters. Each load unit is with a corresponding load entity queue and each load entity queue is associated with a corresponding one of the multiple bus masters. Each load entity queue selects an eviction candidate from the associated copy of the load units currently loaded in the internal memory. Information identifying the eviction candidate for each load entity queue is broadcasted to all load entity queues. The eviction candidate is added to a set of managed eviction candidates if none of the load entity queues vetoes using the eviction candidate.

Abstract: A processor scheduling structure, a method and an integrated circuit are provided. In accordance with at least one embodiment, the processor scheduling structure comprises a processor circuit and an operating system task aware caching (OTC) controller circuit coupled to the processor circuit. The OTC controller circuit comprises a load request timer, a load sequence queue (LSQ), and a request arbiter. The timer and the LSQ are coupled to and provide inputs to the request arbiter. The processor circuit comprises an internal memory and a processor core. The OTC controller circuit is configured to schedule processor tasks for the processor circuit in accordance with both priority-based scheduling, using the LSQ, and time-triggered scheduling, using the load request timer.

Abstract: A circuit includes a one-time programmable (OTP) storage element configured to store a first logic value, an access delay timer configured to initiate a timer in response to a reset event with a timer value, and an access control circuit coupled to the access delay timer and the OTP storage element. The access control circuit is configured to count a number of access requests to the OTP storage element granted by the access control circuit and to store the number of granted access requests to the OTP storage element as a count value. The access control circuit is also configured to grant access to the OTP storage element in response to an access request only when the timer has expired and the count value is less than a predetermined count threshold.

Abstract: A method of managing load units of executable instructions between internal memory in a microcontroller with multiple bus masters, and a non-volatile memory device external to the microcontroller. A copy of the load units are loaded from the external memory device into the internal memory for use by corresponding bus masters. Each load unit is with a corresponding load entity queue and each load entity queue is associated with a corresponding one of the multiple bus masters. Each load entity queue selects an eviction candidate from the associated copy of the load units currently loaded in the internal memory. Information identifying the eviction candidate for each load entity queue is broadcasted to all load entity queues. The eviction candidate is added to a set of managed eviction candidates if none of the load entity queues vetoes using the eviction candidate.

Abstract: An embedded information system includes a load control circuit coupleable to an external memory that contains instructions and constant data (organized by variable sized load units, LUs, and where at least one property of a LU is specified within metadata) associated with application code of a software application, at least one processor configured to execute the at least one application code; an internal memory configured as main system memory in a first part and as a cache for storing the instructions and constant data for an execution of the at least one application code from the external memory in a second part. The load control circuit is configured to load the LUs associated with the at least one application code from the external memory with a granularity of a single LU into the internal memory.

Abstract: A method for improved distribution of a software client application includes: in a first step, an initializing software application is transmitted to a client computing device, wherein the initializing software application is related to the software client application and corresponds to a preliminary part of the software client application; and in a second step subsequent to the first step and upon being requested by the initializing software application, software code of the software client application is transmitted to the client computing device in view of the software client application being installed and/or activated on the client computing device in order to provide the cloud-based communication service.

Abstract: A processor scheduling structure, a method and an integrated circuit are provided. In accordance with at least one embodiment, the processor scheduling structure comprises a processor circuit and an operating system task aware caching (OTC) controller circuit coupled to the processor circuit. The OTC controller circuit comprises a load request timer, a load sequence queue (LSQ), and a request arbiter. The timer and the LSQ are coupled to and provide inputs to the request arbiter. The processor circuit comprises an internal memory and a processor core. The OTC controller circuit is configured to schedule processor tasks for the processor circuit in accordance with both priority-based scheduling, using the LSQ, and time-triggered scheduling, using the load request timer.

Abstract: A processor scheduling structure, a method and an integrated circuit are provided. In accordance with at least one embodiment, the processor scheduling structure comprises a processor circuit and an operating system task aware caching (OTC) controller circuit coupled to the processor circuit. The OTC controller circuit comprises a load request timer, a load sequence queue (LSQ), and a request arbiter. The timer and the LSQ are coupled to and provide inputs to the request arbiter. The processor circuit comprises an internal memory and a processor core. The OTC controller circuit is configured to schedule processor tasks for the processor circuit in accordance with both priority-based scheduling, using the LSQ, and time-triggered scheduling, using the load request timer.

Abstract: A method for improved distribution of a software client application includes: in a first step, an initializing software application is transmitted to a client computing device, wherein the initializing software application is related to the software client application and corresponds to a preliminary part of the software client application; and in a second step subsequent to the first step and upon being requested by the initializing software application, software code of the software client application is transmitted to the client computing device in view of the software client application being installed and/or activated on the client computing device in order to provide the cloud-based communication service.

Abstract: A better basis for a further processing such as virtual view rendering, in form of a disparity map is achieved. To this end, the disparity map generation is done in two separate steps, namely the generation of two depth/disparity map estimates based on two different pairs of views of the scene in a manner independent from each other, with then comparing both depth/disparity map estimates so as to obtain a reliability measure for one or both of the depth/disparity map estimates.

Abstract: A location of a shared vehicle is identified. Shared vehicle usage data is obtained for the location. An instruction is provided to adjust an operating mode of the shared vehicle based at least on the shared vehicle usage data and the location.

Abstract: A filter structure for filtering a disparity map includes a first filter, a second filter, and a filter selector. The first filter is for filtering a contemplated section of the disparity map according to a first measure of central tendency. The second filter is for filtering the contemplated section of the disparity maps according to a second measure of central tendency. The filter selector is provided for selecting the first filter or the second filter for filtering the contemplated section of the disparity map, the selection being based on at least one local property of the contemplated section. A corresponding method for filtering a disparity map includes determining a local property of the contemplated section and selecting a filter. The contemplated section is then filtered using the first filter or the second filter depending on a result of the selection.

Abstract: A location of a shared vehicle is identified. Shared vehicle usage data is obtained for the location. An instruction is provided to adjust an operating mode of the shared vehicle based at least on the shared vehicle usage data and the location.

Abstract: An apparatus for estimating a disparity map based on at least two images is provided. The apparatus includes at least two processing units, which include a pixel recursion unit configured to determine a disparity value as a pixel recursion disparity candidate based on a plurality of pixel values of the at least two images and a selector configured to select a selected disparity candidate to determine at least one of the disparity map values of the disparity map. The selector is adapted to select the selected disparity candidate from a candidate group assigned to the selector. The candidate group assigned to the selector includes the pixel recursion disparity candidate, a second disparity candidate and a third disparity candidate. Moreover, the selector is adapted to select the selected disparity candidate independently from a different selector of a different processing unit of the at least two processing units.

Abstract: An exterior mirror has a mirror foot lower part mounted in a cavity in a vehicle door. A mirror foot upper part is mounted on the mirror foot lower part via a six-point mounting so that the mirror foot upper part protrudes from the door. A mirror head is mounted on the mirror foot upper part. The two mirror foot parts are held pressed together via a leaf spring and a separating plane between the two mirror foot parts of the exterior mirror is in the door cavity. In the event of a pendulum impact, the mirror foot upper part together with the mirror head is separated from the door-mounted mirror foot lower part and remains in the cavity of the door.

Abstract: A better basis for a further processing such as virtual view rendering, in form of a disparity map is achieved. To this end, the disparity map generation is done in two separate steps, namely the generation of two depth/disparity map estimates based on two different pairs of views of the scene in a manner independent from each other, with then comparing both depth/disparity map estimates so as to obtain a reliability measure for one or both of the depth/disparity map estimates.

Abstract: A filter structure for filtering a disparity map includes a first filter, a second filter, and a filter selector. The first filter is for filtering a contemplated section of the disparity map according to a first measure of central tendency. The second filter is for filtering the contemplated section of the disparity maps according to a second measure of central tendency. The filter selector is provided for selecting the first filter or the second filter for filtering the contemplated section of the disparity map, the selection being based on at least one local property of the contemplated section. A corresponding method for filtering a disparity map includes determining a local property of the contemplated section and selecting a filter. The contemplated section is then filtered using the first filter or the second filter depending on a result of the selection.