Patents by Inventor Marcus Pierre DÜLK

Marcus Pierre DÜLK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11670914
    Abstract: An edge-emitting semiconductor laser diode chip 15 with mutually opposed front and back end facet mirrors 22, 24. First and second ridges 261, 262 extend between the chip end facets 22, 24 to define first and second waveguides in an active region layer. Low and high slope efficiency laser diodes are thus formed that are independently drivable by respective electrode pairs 211, 231 and 212, 232. The single chip 15 thus incorporates two laser diodes sharing a common heterostructure, one with low slope efficiency optimized for low power operation with good power stability against temperature variations and random threshold current fluctuations in the close-to-threshold power regime, and the other with high slope efficiency optimized for high wall plug efficiency operation at higher output powers when the chip is operating far above threshold.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: June 6, 2023
    Assignee: EXALOS AG
    Inventors: Antonino Francesco Castiglia, Marco Rossetti, Marco Malinverni, Marcus Pierre Dülk, Christian Velez
  • Publication number: 20210367409
    Abstract: An edge-emitting semiconductor laser diode chip 15 with mutually opposed front and back end facet mirrors 22, 24. First and second ridges 261, 262 extend between the chip end facets 22, 24 to define first and second waveguides in an active region layer. Low and high slope efficiency laser diodes are thus formed that are independently drivable by respective electrode pairs 211, 231 and 212, 232. The single chip 15 thus incorporates two laser diodes sharing a common heterostructure, one with low slope efficiency optimized for low power operation with good power stability against temperature variations and random threshold current fluctuations in the close-to-threshold power regime, and the other with high slope efficiency optimized for high wall plug efficiency operation at higher output powers when the chip is operating far above threshold.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 25, 2021
    Applicant: EXALOS AG
    Inventors: Antonino Francesco CASTIGLIA, Marco ROSSETTI, Marco MALINVERNI, Marcus Pierre DÜLK, Christian VELEZ