Patents by Inventor Marcus Völp

Marcus Völp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230393945
    Abstract: The present invention pertains to electronics (circuits and systems comprising such circuits, specifically like tiled multi- and manycore systems) for use in increased radiation environments. The invention provides (operating) methods and apparatuses (systems) for mitigating radiation effects in the (main) circuits (also denoted tiles) defining these apparatuses by adapting those or providing those with additional building blocks, enabling use of a depowering technique The invention also mitigates radiation effects in those building blocks (circuits or subcircuits) of the apparatuses themselves. The invention enables to retain full functionality on those resources of the chip that are not currently undergoing a depowering cycle, hence avoids power cycling those all simultaneously.
    Type: Application
    Filed: January 28, 2022
    Publication date: December 7, 2023
    Inventors: Rafal GRACZYK, Marcus VÖLP, Paulo ESTEVES-VERÍSSIMO
  • Patent number: 11657899
    Abstract: Genomics information such as DNA, RNA and proteins carry a wealth of sensitive information, the exposure of which risks compromising the privacy and/or business interest of individuals and companies. An apparatus, a system and methods are disclosed for protecting sensitive genomic information either as it is produced by a sequencing machine or immediately therafter, then throughout the whole genomic workflow. Raw genomic data (“reads”) is detected and classified according to sensitivity. Reads are decomposed by excising the number and type of detected sensitive base or base pairs in less sensitive or insensitive parts of the read. The genomic workflow processes the excised information locally or in a distributed fashion, preferably within trusted execution environments for increased security.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: May 23, 2023
    Assignee: Université du Luxembourg
    Inventors: Paulo Esteves-Veríssimo, Marcus Völp, Jérémie Decouchant, Maria Fernandes
  • Patent number: 11416617
    Abstract: There is disclosed a computing/data processing device comprising: a plurality of computing units, each computing unit comprising a computing resource; the computing device comprising at least three computing units, each computing unit comprising a/the same computing resource; each computing unit further comprising a computing unit access manager, each unit access manager being adapted to control access to the computing resource of the respective computing unit in response to at least one request; wherein, the computing unit access manager only allows a response to the at least one request if a majority of the computing units provide a same response to the at least one request; and wherein, the computing device comprising a network-on-a-chip, is provided on a chip and/or comprises an integrated chip (IC) or microprocessor. The IC beneficially comprises a Field-Programmable Gate Array (FPGA) device.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: August 16, 2022
    Assignee: Université du Luxembourg
    Inventors: Marcus Völp, Paulo Esteves-Veríssimo, Jérémie Decouchant, Vincent Rahli, Francisco Rocha
  • Patent number: 11176256
    Abstract: A capability-based data processing architecture (100) integrating an attesting module (120) are disclosed, together with subroutines for: securing the booting phase of a replicated or unreplicated subsystem (150) of computing units (130, 140) in the architecture and attesting to same; for adding and removing computing units (140) to and from booted systems 150; for relabelling authentication tokens when the booted subsystem (150) comprises computing units; for sealing and unsealing a memory storing data structures that are processed by the other subroutines described herein; and for recovering a booted subsystem (150) beset by faults.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: November 16, 2021
    Assignee: Université du Luxembourg
    Inventors: Marcus Völp, Paulo Esteves-Veríssimo
  • Publication number: 20210081535
    Abstract: A capability-based data processing architecture (100) integrating an attesting module (120) are disclosed, together with subroutines for: securing the booting phase of a replicated or unreplicated subsystem (150) of computing units (130, 140) in the architecture and attesting to same; for adding and removing computing units (140) to and from booted systems 150; for relabelling authentication tokens when the booted subsystem (150) comprises computing units; for sealing and unsealing a memory storing data structures that are processed by the other subroutines described herein; and for recovering a booted subsystem (150) beset by faults.
    Type: Application
    Filed: May 17, 2019
    Publication date: March 18, 2021
    Inventors: Marcus Völp, Paulo Esteves-Veríssimo
  • Publication number: 20200234794
    Abstract: Genomics information such as DNA, RNA and proteins carry a wealth of sensitive information, the exposure of which risks compromising the privacy and/or business interests of individuals and companies. An apparatus, a system and methods are disclosed for protecting sensitive genomic information either as it is produced by a sequencing machine or immediately thereafter, then throughout the whole genomic workflow. Raw genomic data (“reads”) is detected and classified according to sensitivity. Reads are decomposed by excising the number and type of detected sensitive base or base pairs in less sensitive or insensitive parts of the read. The genomic workflow processes the excised information locally or in a distributed fashion, preferably within trusted execution environments for increased security.
    Type: Application
    Filed: September 26, 2018
    Publication date: July 23, 2020
    Inventors: Paulo Esteves-Veríssimo, Marcus Völp, Jérémie Decouchant, Maria Fernandes
  • Publication number: 20200175168
    Abstract: There is disclosed a computing/data processing device comprising: a plurality of computing units, each computing unit comprising a computing resource; the computing device comprising at least three computing units, each computing unit comprising a/the same computing resource; each computing unit further comprising a computing unit access manager, each unit access manager being adapted to control access to the computing resource of the respective computing unit in response to at least one request; wherein, the computing unit access manager only allows a response to the at least one request if a majority of the computing units provide a same response to the at least one request; and wherein, the computing device comprising a network-on-a-chip, is provided on a chip and/or comprises an integrated chip (IC) or microprocessor. The IC beneficially comprises a Field-Programmable Gate Array (FPGA) device.
    Type: Application
    Filed: February 8, 2018
    Publication date: June 4, 2020
    Inventors: Marcus Völp, Paulo Esteves-Veríssimo, Jérémie Decouchant, Vincent Rahli, Francisco Rocha
  • Patent number: 7657034
    Abstract: For the encryption of data to be stored in a memory external to a circuit, provision is made to store in the external memory encrypted data words in association with an initialization vector and a key identifier associated with a secret key that has served to encrypt same.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: February 2, 2010
    Assignee: STMicroelectronics SA
    Inventors: Marcus Völp, Claude Anguille