Patents by Inventor Mardechay Farkash

Mardechay Farkash has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit support structures and their fabrication
    Patent number: 7635641
    Abstract: A method of fabricating an electronic substrate comprising the steps of; (A) selecting a first base layer; (B) depositing a first etchant resistant barrier layer onto the first base layer; (C) building up a first half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers; (D) applying a second base layer onto the first half stack; (F) applying a protective coating of photoresist to the second base layer; (F) etching away the first base layer; (G) removing the protective coating of photoresist; (H) removing the first etchant resistant barrier layer; (I) building up a second half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers, wherein the second half stack has a substantially symmetrical lay up to the first half stack; (J) applying an insulating layer onto the second hall stack of alternating conductive layers and insulating laye
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: December 22, 2009
    Assignee: Amitec-Advanced Multilayer Interconnect Technologies Ltd.
    Inventors: Dror Hurwitz, Mardechay Farkash, Eva Igner, Amit Zeidler, Boris Statnikov, Benny Michaeli
  • Novel integrated circuit support structures and their fabrication
    Publication number: 20070082501
    Abstract: A method of fabricating an electronic substrate comprising the steps of; (A) selecting a first base layer; (B) depositing a first etchant resistant barrier layer onto the first base layer; (C) building up a first half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers; (D) applying a second base layer onto the first half stack; (F) applying a protective coating of photoresist to the second base layer; (F) etching away the first base layer; (G) removing the protective coating of photoresist; (H) removing the first etchant resistant barrier layer; (I) building up a second half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers, wherein the second half stack has a substantially symmetrical lay up to the first half stack; (J) applying an insulating layer onto the second hall stack of alternating conductive layers and insulating laye
    Type: Application
    Filed: October 17, 2005
    Publication date: April 12, 2007
    Inventors: Dror Hurwitz, Mardechay Farkash, Eva Igner, Amit Zeidler, Boris Statnikov, Benny Michaeli