Patents by Inventor Marek S. Tlalka

Marek S. Tlalka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High speed signal conditioning package
    Patent number: 9245828
    Abstract: A package and integrated circuit assembly is configured to perform signal conditioning on a signal. The assembly includes a line card having line card contacts that correspond to conductors in the line card connector. Two or more integrated circuits are configured to perform signal conditioning on the signal and the two or more integrated circuits are configured within a package into at least a first row and a second row on the package. The package includes a grid array of bonding pads to electrically connect to the two or more integrated circuits through bond wires or down bonds such that the structure of the grid array corresponds in physical arrangement or bond pad pitch to the line card contacts. This assembly also includes an electrical connection from the two or more integrated circuits to the line card through the package.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: January 26, 2016
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Atul K. Gupta, Ryan S. Latchman, Marek S. Tlalka
  • High Speed Signal Conditioning Package
    Publication number: 20140021597
    Abstract: A package and integrated circuit assembly is configured to perform signal conditioning on a signal. The assembly includes a line card having line card contacts that correspond to conductors in the line card connector. Two or more integrated circuits are configured to perform signal conditioning on the signal and the two or more integrated circuits are configured within a package into at least a first row and a second row on the package. The package includes a grid array of bonding pads to electrically connect to the two or more integrated circuits through bond wires or down bonds such that the structure of the grid array corresponds in physical arrangement or bond pad pitch to the line card contacts. This assembly also includes an electrical connection from the two or more integrated circuits to the line card through the package.
    Type: Application
    Filed: July 11, 2013
    Publication date: January 23, 2014
    Inventors: Atul K. Gupta, Ryan S. Latchman, Marek S. Tlalka