Abstract: Systems and methods disclosed herein provide for variable data width memory. For example, in accordance with an embodiment of the present invention, a technique for doubling a width of a memory is disclosed, without having to increase a width of the internal data path or the number of input/output pads.

Abstract: Systems and methods are disclosed herein to provide techniques for writing to certain bits of a word location in a memory. For example, in accordance with an embodiment of the present invention, a method of implementing byte enable logic for a memory is disclosed, with the byte enable logic signals provided on one or more address lines.

Abstract: In accordance with an embodiment of the present invention, a programmable logic device includes a plurality of logic blocks, a plurality of memory blocks, and a plurality of continuation routing paths associated with the memory blocks. A plurality of continuation multiplexers, coupled to the continuation routing paths, are adapted to route signals between the memory blocks, between the logic blocks, and/or between the memory blocks and the logic blocks.

Abstract: Systems and methods provide sense amplifier timing techniques. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a plurality of memory cells and a sense amplifier that provides a sense amplifier output signal based on data provided by the plurality of memory cells, with the sense amplifier output signal provided under control of a sense amplifier enable signal. A delay control circuit provides a delay to the sense amplifier enable signal based on a value provided by at least one configuration fuse.

Abstract: Systems and methods provide output data from a memory. For example, in accordance with an embodiment of the present invention, techniques are disclosed for providing glitch-free output data from a memory through feedback of the output data signal.

Abstract: In method for manufacturing an integrated circuit improves the reliability of thermosonic bonds formed to attach a gold bond wire to an aluminum interconnect pad, where a pad opening in the integrated circuit is on the order of 60 microns. In the method, a reactive ion etch (RIE) passivation etch is used which does not include a, more corrosive sulfur hexa-fluoride to remove the SiO2 passivation layer above the pad. Instead, the RIE uses argon as the carrier gas, carbon tetrafluoride (CF4) and trifluoromethane (CHF3) as active etchants, and oxygen (O2) to reduce the residual halide contaminant in the aluminum pad. Further, a thin titanium layer is deposited beneath the aluminum pad layer to improve adhesion of the aluminum pad to underlying layers of the semiconductor integrated circuit. The aluminum pad layer is made very thin, or less than approximately 8000 Å, to limit Kirkendall voiding.