Patents by Inventor Margie Rios

Margie Rios has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9685398
    Abstract: In a general aspect, a packaged semiconductor device can include a semiconductor die having at least a first terminal on a first side of the semiconductor die and a second terminal on a second side of the semiconductor die. The device can include a leadframe portion electrically coupled to the first terminal of the semiconductor die and a clip portion electrically coupled to the second terminal of the semiconductor die. The device can include a molding compound. A surface of the leadframe portion and a first surface of the molding compound can define at least a portion of a first surface of the device. A surface of the clip portion and a second surface of the molding compound can define at least a portion of a second surface of the device that is parallel to the first surface of the device.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: June 20, 2017
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Margie Rios, Aira Lourdes Villamor, Maria Cristina Estacio, Armand Vincent Jereza
  • Publication number: 20160284628
    Abstract: In a general aspect, a packaged semiconductor device can include a semiconductor die having at least a first terminal on a first side of the semiconductor die and a second terminal on a second side of the semiconductor die. The device can include a leadframe portion electrically coupled to the first terminal of the semiconductor die and a clip portion electrically coupled to the second terminal of the semiconductor die. The device can include a molding compound. A surface of the leadframe portion and a first surface of the molding compound can define at least a portion of a first surface of the device. A surface of the clip portion and a second surface of the molding compound can define at least a portion of a second surface of the device that is parallel to the first surface of the device.
    Type: Application
    Filed: March 28, 2016
    Publication date: September 29, 2016
    Inventors: Margie RIOS, Aira Lourdes VILLAMOR, Maria Cristina ESTACIO, Armand Vincent JEREZA
  • Publication number: 20060189116
    Abstract: A method for forming a stud bumped semiconductor die is disclosed. The method includes forming a ball at the tip of a coated wire passing through a hole in a capillary, where the coated wire has a core and an oxidation-resistant coating. The formed ball is pressed to the conductive region on the semiconductor die. The coated wire is cut, thereby leaving a conductive stud bump on the conductive region, where the conductive stud bump includes an inner conductive portion and an outer oxidation-resistant layer.
    Type: Application
    Filed: April 14, 2006
    Publication date: August 24, 2006
    Inventors: Rajeev Joshi, Consuelo Tangpuz, Margie Rios, Erwin Victor Cruz
  • Publication number: 20050224940
    Abstract: A packaging assembly for semiconductor devices and a method for making such packaging is described. The invention provides a non-Pb bump design during a new flip-chip method of packaging. The design uses special conductive materials in a stud form, rather than a solder ball containing Pb. This configuration maintains a desirable solder thickness between the die and the leadframe and forms a high standoff by restricting solder wettabilty on the leadframe side. This configuration also absorbs any stress and protects the die from cracking. The invention also provides methods for making such semiconductor packages.
    Type: Application
    Filed: June 3, 2005
    Publication date: October 13, 2005
    Inventors: Consuelo Tangpuz, Romel Manatad, Margie Rios, Erwin Cruz