Patents by Inventor Maria C. Gutierrez

Maria C. Gutierrez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7295557
    Abstract: A system includes a plurality of computers interconnected by a network including one or more switching nodes. The computers transfer messages over virtual circuits established thereamong. A computer, as a source computer for one or more virtual circuit(s), schedules transmission of messages on a round-robin basis as among the virtual circuits for which it is source computer. Each switching node which forms part of a path for respective virtual circuits also forwards messages for virtual circuits in a round-robin manner, and, a computer, as a destination computer for one or more virtual circuit(s), schedules processing of received messages in a round-robin manner. Round-robin transmission, forwarding and processing at the destination provides a degree of fairness in message transmission as among the virtual circuits established over the network.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: November 13, 2007
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Shawn A. Clayton, David R. Follett, Nitin D. Godiwala, Maria C. Gutierrez, David S. Wells, James B. Williams
  • Patent number: 7283471
    Abstract: A system includes a plurality of computers interconnected by a network including one or more switching nodes. The computers transfer messages over virtual circuits established thereamong. A computer, as a source computer for one or more virtual circuit(s), schedules transmission of messages on a round-robin basis as among the virtual circuits for which it is source computer. Each switching node which forms part of a path for respective virtual circuits also forwards messages for virtual circuits in a round-robin manner, and, a computer, as a destination computer for one or more virtual circuit(s), schedules processing of received messages in a round-robin manner. Round-robin transmission, forwarding and processing at the destination provides a degree of fairness in message transmission as among the virtual circuits established over the network.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: October 16, 2007
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Maria C. Gutierrez, Shawn Adam Clayton, David R. Follett, Harold E. Roman, Nitin D. Godiwala, Richard F. Prohaska, James B. Williams
  • Publication number: 20040208181
    Abstract: A system includes a plurality of computers interconnected by a network including one or more switching nodes. The computers transfer messages over virtual circuits established thereamong. A computer, as a source computer for one or more virtual circuit(s), schedules transmission of messages on a round-robin basis as among the virtual circuits for which it is source computer. Each switching node which forms part of a path for respective virtual circuits also forwards messages for virtual circuits in a round-robin manner, and, a computer, as a destination computer for one or more virtual circuit(s), schedules processing of received messages in a round-robin manner. Round-robin transmission, forwarding and processing at the destination provides a degree of fairness in message transmission as among the virtual circuits established over the network.
    Type: Application
    Filed: May 7, 2004
    Publication date: October 21, 2004
    Applicant: Emulex Design & Manufacturing Corporation
    Inventors: Shawn A. Clayton, David R. Follett, Nitin D. Godiwala, Maria C. Gutierrez, David S. Wells, James B. Williams
  • Patent number: 6795442
    Abstract: A system includes interconnected computers and switching nodes. A source computer for the virtual circuits schedules message transmissions on a round-robin basis. Each switching node also forwards messages in a round-robin manner, and a destination computer schedules processing of received messages in a round-robin manner. In addition, messages are transmitted in cells to reduce delays in short messages if long messages are transmitted for one virtual circuit before transmission of a short message for another virtual circuit. For each virtual circuit, the destination computer and each switching node can generate a virtual circuit flow control message to temporarily limit transmissions if the resources being taken up by messages exceed predetermined thresholds. In addition, each switching node or computer can generate link flow control messages for transmission to neighboring devices to temporarily limit transmissions if the resources taken up by all virtual circuits exceeds predetermined thresholds.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: September 21, 2004
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Shawn A. Clayton, David R. Follett, Nitin D. Godiwala, Maria C. Gutierrez, David S. Wells, James B. Williams
  • Publication number: 20030174647
    Abstract: A system includes a plurality of computers interconnected by a network including one or more switching nodes. The computers transfer messages over virtual circuits established thereamong. A computer, as a source computer for one or more virtual circuit(s), schedules transmission of messages on a round-robin basis as among the virtual circuits for which it is source computer. Each switching node which forms part of a path for respective virtual circuits also forwards messages for virtual circuits in a round-robin manner, and, a computer, as a destination computer for one or more virtual circuit(s), schedules processing of received messages in a round-robin manner. Round-robin transmission, forwarding and processing at the destination provides a degree of fairness in message transmission as among the virtual circuits established over the network.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 18, 2003
    Applicant: Emulex Corporation, a California corporation
    Inventors: Maria C. Gutierrez, Shawn A. Clayton, David R. Follett, Nitin D. Godiwala, Richard F. Prohaska, Harold E. Roman, James B. Williams
  • Patent number: 6570850
    Abstract: A system includes a plurality of computers interconnected by a network including one or more switching nodes. The computers transfer messages over virtual circuits established thereamong. A computer, as a source computer for one or more virtual circuit(s), schedules transmission of messages on a round-robin basis as among the virtual circuits for which it is source computer. Each switching node which forms part of a path for respective virtual circuits also forwards messages for virtual circuits in a round-robin manner, and, a computer, as a destination computer for one or more virtual circuit(s), schedules processing of received messages in a round-robin manner. Round-robin transmission, forwarding and processing at the destination provides a degree of fairness in message transmission as among the virtual circuits established over the network.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: May 27, 2003
    Assignee: Giganet, Inc.
    Inventors: Maria C. Gutierrez, Shawn A. Clayton, David R. Follett, Nitin D. Godiwala, Richard F. Prohaska, Harold E. Roman, James B. Williams
  • Patent number: 6094712
    Abstract: A computer interface system for communicating between computers along designated circuits is provided. An interface unit is provided in each host computer. Each unit includes a memory map that stores a map of physical addresses that correspond to virtual addresses for each application involved in a communication link. Each transfer of data is designated by a circuit that is established using the ATM protocol. The circuit is recognized by each unit involved in the communication and facilitates direct access of each host computer's main memory with minimum intervention from the operating system. A novel dynamic buffer management system is also provided.
    Type: Grant
    Filed: December 4, 1996
    Date of Patent: July 25, 2000
    Assignee: Giganet, Inc.
    Inventors: David R. Follett, Maria C. Gutierrez, Richard F. Prohaska