Patents by Inventor Maria Gill

Maria Gill has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070100599
    Abstract: Data streams are generated for tracing target processor activity. When multiple streams are on, they are written at different times into their individual FIFO. It is possible that for a specific stream, the length and fields of the data that should be exported vary. This invention is a scheme to send out only the relevant fields.
    Type: Application
    Filed: November 28, 2006
    Publication date: May 3, 2007
    Inventors: Manisha Agarwala, Maria Gill, John Johnsen
  • Publication number: 20070094537
    Abstract: An memory access address comparator includes two comparators comparing an input memory access address with respective reference addresses. The comparators produce a match indication on selectable criteria, such as address size, full or partial overlap, greater than, less than, equal to, not equal to, less than or equal to, and greater than or equal to, and can be selectively chained. Input multiplexers permit memory access address bus selection. The comparator output may be selectively dependent upon corresponding data matches. The reference addresses, comparison data and control functions are enabled via central processing unit accessible memory mapped registers.
    Type: Application
    Filed: December 5, 2006
    Publication date: April 26, 2007
    Inventors: Jose Flores, Lewis Nardini, Maria Gill
  • Publication number: 20070011662
    Abstract: A method of tracing program counter activity in a data processor periodically transmits a program counter sync point including the current program counter address. Between sync points the program counter address is indicated by a program counter offset relative to the last program counter sync point. The program counter offset is sent as integral number of sections of a predetermined number of bits. Program counter sync points are transmitted often enough so that the program counter offset requires at most one less section than the program counter address.
    Type: Application
    Filed: May 15, 2006
    Publication date: January 11, 2007
    Inventors: Manisha Agarwala, Bryan Thome, John Johnsen, Gary Swoboda, Lewis Nardini, Maria Gill
  • Publication number: 20060294426
    Abstract: A method of scheduling trace packets in an integrated circuit generating trace packets of plural types stores trace data in respective first-in-first-out buffers. If a timing trace data first-in-first-out buffer is empty, timing trace data packet is transmitted. If a program counter overall data first-in-first-out buffer is not empty and the processor is at a data interruptible boundary, transmitting a program counter data packet. If data first-in-first-out buffer is not empty, transmitting a data packet. The program counter data packets include program counter sync data, program counter exception data, program counter relative branch data and program counter absolute branch data.
    Type: Application
    Filed: August 28, 2006
    Publication date: December 28, 2006
    Inventors: Manisha Agarwala, Maria Gill
  • Publication number: 20060288254
    Abstract: A method of trace data compression receives trace data on a first port and a second port stores a prior data value. If trace data is received on only one port, then that trace data is transmitted as an indication of matching and non-matching sections between the current trace data and the stored data value and the non-matching sections of the current trace data on the one port. If trace data is received on both ports, then the first port trace data is transmitted relative to the prior stored value and the second port trace data is transmitted relative to the first port trace data. The stored prior data is reset to zero upon each initiation or termination of trace data on either port. The stored prior value is set to the second port value or the first port value if no second port value is received.
    Type: Application
    Filed: August 28, 2006
    Publication date: December 21, 2006
    Inventors: Manisha Agarwala, Lewis Nardini, John Johnsen, Maria Gill, Jose Flores
  • Publication number: 20060282706
    Abstract: An program counter address comparator includes two comparators comparing an input program counter address with respective reference addresses. The comparators produce a match indication on selectable criteria, such as greater than, less than, equal to, not equal to, less than or equal to, and greater than or equal to, and can be selectively chained. Input multiplexers permit selection of either the program counter address bus or a secondary address bus. The reference addresses and control functions are enabled via central processing unit accessible memory mapped registers.
    Type: Application
    Filed: August 28, 2006
    Publication date: December 14, 2006
    Inventors: Jose Flores, Lewis Nardini, Maria Gill
  • Publication number: 20060248397
    Abstract: A method of tracing data processor activity with recover from detection of trace stream corruption. If the first trace data following detection of corruption is not a program counter sync point, then the trace transmits an indication of the current program counter address in an offset format from the program counter address of a last transmitted program counter sync point and then transmits trace data in event offset format. If the first trace data following detection of corruption is a program counter sync point, then the trace transmits trace data in event offset format.
    Type: Application
    Filed: July 12, 2006
    Publication date: November 2, 2006
    Inventors: John Johnsen, Manisha Agarwala, Maria Gill