Patents by Inventor Maria Santina Marangon
Maria Santina Marangon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10522757Abstract: In various examples, dual resistive-material regions for a phase change material region are fabricated by initially forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, in certain embodiments, the portion of the resistive material proximate to the phase change material region may be used as a heater because of a relatively, high resistance value of the resistive material, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.Type: GrantFiled: December 21, 2017Date of Patent: December 31, 2019Assignee: Micron Technology, Inc.Inventors: Yudong Kim, Ilya V Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
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Patent number: 10522756Abstract: In various examples, a dual resistance heater for a phase change material region is fabricated by forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, the portion of the resistive material proximate to the phase change material region forms a heater because of its high resistance value, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.Type: GrantFiled: February 6, 2015Date of Patent: December 31, 2019Assignee: Micron Technology, Inc.Inventors: Yudong Kim, Ilya V Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
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Publication number: 20180138406Abstract: In various examples, dual resistive-material regions for a phase change material region are fabricated by initially forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, in certain embodiments, the portion of the resistive material proximate to the phase change material region may be used as a heater because of a relatively, high resistance value of the resistive material, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.Type: ApplicationFiled: December 21, 2017Publication date: May 17, 2018Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
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Publication number: 20150188050Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.Type: ApplicationFiled: February 6, 2015Publication date: July 2, 2015Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
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Patent number: 8952299Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.Type: GrantFiled: August 19, 2013Date of Patent: February 10, 2015Assignee: Micron Technology, Inc.Inventors: Yudong Kim, Ilya V Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler A. Lowrey
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Publication number: 20140038379Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.Type: ApplicationFiled: August 19, 2013Publication date: February 6, 2014Applicant: Micron Technology, Inc.Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler A. Lowrey
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Patent number: 8513576Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.Type: GrantFiled: December 28, 2010Date of Patent: August 20, 2013Assignee: Micron Technology, Inc.Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler Lowrey
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Publication number: 20110155986Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.Type: ApplicationFiled: December 28, 2010Publication date: June 30, 2011Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler Lowrey
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Patent number: 7880123Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.Type: GrantFiled: December 19, 2005Date of Patent: February 1, 2011Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler Lowrey
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Patent number: 7606056Abstract: A process for manufacturing a phase change memory array includes the steps of: forming a plurality of phase change memory cells in an array region of a semiconductor wafer, the phase change memory cells arranged in rows and columns according to a row direction and to a column direction, respectively; forming a control circuit in a control region of the semiconductor wafer; forming a plurality of first bit line portions for mutually connecting phase change memory cells arranged on a same column; forming first level electrical interconnection structures; and forming second level electrical interconnection structures above the first level electrical interconnection structures. The first level electrical interconnection structures include second bit line portions laying on and in contact with the first bit line portions and projecting from the first bit line portions in the column direction for connecting the first bit line portions to the control circuit.Type: GrantFiled: December 22, 2005Date of Patent: October 20, 2009Assignee: STMicroelectronics S.r.l.Inventors: Fabio Pellizzer, Roberto Bez, Maria Santina Marangon, Roberta Piva, Laura Aina
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Publication number: 20080217776Abstract: An embodiment is described for manufacturing integrated circuits formed on a semiconductor substrate, which embodiment comprises forming a cobalt suicide layer on said semiconductor substrate, forming a layer comprising tungsten on said silicide layer, said cobalt suicide layer forming a barrier against the migration of the silicon atoms of said semiconductor substrate during the formation step of said layer comprising tungsten. An embodiment is also described for manufacturing contacts comprising tungsten of an integrated circuit formed on a semiconductor substrate.Type: ApplicationFiled: March 5, 2008Publication date: September 11, 2008Applicant: STMICROELECTRONICS S.r.l.Inventors: Maria Santina Marangon, Davide Erbetta
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Patent number: 6946673Abstract: A vertical-current-flow resistive element includes a monolithic region having a first portion and a second portion arranged on top of one another and formed from a single material. The first portion has a first resistivity, and the second portion has a second resistivity, lower than the first resistivity. To this aim, a monolithic region with a uniform resistivity and a height greater than at least one of the other dimensions is first formed; then the resistivity of the first portion is increased by introducing, from the top, species that form a prevalently covalent bond with the conductive material of the monolithic region, so that the concentration of said species becomes higher in the first portion than in the second portion. Preferably, the conductive material is a binary or ternary alloy, chosen from among TiAl, TiSi, TiSi2, Ta, WSi, and the increase in resistivity is obtained by nitridation.Type: GrantFiled: January 14, 2003Date of Patent: September 20, 2005Assignees: STMicroelectronics S.r.l., Ovonyx, Inc.Inventors: Romina Zonca, Maria Santina Marangon, Giorgio De Santi
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Publication number: 20030161195Abstract: A vertical-current-flow resistive element includes a monolithic region having a first portion and a second portion arranged on top of one another and formed from a single material. The first portion has a first resistivity, and the second portion has a second resistivity, lower than the first resistivity. To this aim, a monolithic region with a uniform resistivity and a height greater than at least one of the other dimensions is first formed; then the resistivity of the first portion is increased by introducing, from the top, species that form a prevalently covalent bond with the conductive material of the monolithic region, so that the concentration of said species becomes higher in the first portion than in the second portion. Preferably, the conductive material is a binary or ternary alloy, chosen from among TiAl, TiSi, TiSi2, Ta, WSi, and the increase in resistivity is obtained by nitridation.Type: ApplicationFiled: January 14, 2003Publication date: August 28, 2003Applicant: STMicroelectronics S.r.l.Inventors: Romina Zonca, Maria Santina Marangon, Giorgio De Santi
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Patent number: 6465950Abstract: The microtips of charge emitting material, which define the cathode of the flat FED screen and face the grid of the screen, are tubular and have portions with a small radius of curvature. The microtips are obtained by forming openings in the dielectric layer separating the cathode connection layer from the grid layer, depositing a conducting material layer to cover the walls of the openings, and anisotropically etching the layer of conducting material to form inwardly-inclined surfaces with emitting tips. Subsequently, the portions of the dielectric layer surrounding the microtips are removed.Type: GrantFiled: January 13, 2000Date of Patent: October 15, 2002Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Livio Baldi, Maria Santina Marangon
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Patent number: 6036566Abstract: The microtips of charge emitting material, which define the cathode of the flat FED screen and face the grid of the screen, are tubular and have portions with a small radius of curvature. The microtips are obtained by forming openings in the dielectric layer separating the cathode connection layer from the grid layer, depositing a conducting material layer to cover the walls of the openings, and anisotropically etching the layer of conducting material to form inwardly-inclined surfaces with emitting tips. Subsequently, the portions of the dielectric layer surrounding the microtips are removed.Type: GrantFiled: October 2, 1997Date of Patent: March 14, 2000Assignee: SGS-Thomson Microelectronics S.R.L.Inventors: Livio Baldi, Maria Santina Marangon
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Patent number: 5786272Abstract: A plug contact process wherein, after contact holes are etched, an adhesion layer (such as Ti/TiN) and a filler metal (such as tungsten) are deposited overall. A two-stage etch is then used: First, the filler metal is etched preferentially with respect to the adhesion layer, until an endpoint signal first indicates that said adhesion layer is exposed. No overetch is used at this stage. Thereafter a nonpreferential etch is used to clear residues of the filler metal, while also uniformly reducing the height of the adhesion layer. This prevents the tops of the plugs in the contact holes from being recessed. Aluminum (or other metal) is then deposited and patterned (using a stack etch to remove the undesired portions of the adhesion layer too) to implement the desired wiring pattern. This process thereby reduces voids, and resulting metallization defects, in a process with high-aspect-ratio contacts. In addition, the residual adhesion layer helps to reduce electromigration.Type: GrantFiled: April 18, 1995Date of Patent: July 28, 1998Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Maria Santina Marangon, Andrea Marmiroli, Giorgio Desanti