Abstract: A semiconductor device is provided with a FET having a sufficiently small short channel effect and sufficiently small junction capacitance and junction leakage current. The FET includes a channel region formed in a silicon substrate, a gate electrode formed on the channel region through the intermediary of a gate insulting film, heavily doped regions, and pocket regions. The pocket regions are formed to extend from inside the heavily doped regions, respectively, over inside the channel region. Because a pocket sub-region inside the respective heavily doped regions is formed to be located in regions shallower than the respective lower end faces of the heavily doped regions, junction capacitance and junction leakage current are reduced. Further, because respective pocket sub-regions inside the channel region are formed in regions deeper than the respective pocket sub-regions inside the heavily doped regions, a short channel effect can be reduced.

Abstract: A semiconductor device includes a silicon layer on an insulating layer. The silicon layer has a first area and a second area. An FD-MOSFET is formed in the first area and a PD-MOSFET is formed in the second area. The semiconductor device satisfies the following formulas: the thickness of the silicon layer is 28 nm to 42 nm, the impurity concentration Df cm?3 of the first area is Df?9.29*1015*(62.46?ts) and Df?2.64*1015*(128.35?ts), and the impurity concentration Dp of the second area is Dp?9.29*1015*(62.46?ts) and Dp?2.64*1015*(129.78?ts).

Abstract: A semiconductor device is provided with a FET having a sufficiently small short channel effect as well as sufficiently small junction capacitance and junction leak current. The FET comprises a channel region formed in a silicon substrate, a gate electrode formed on the channel region through the intermediary of a gate insulting film, heavily doped regions, and pocket regions. The pocket regions are formed so as to extend from inside the heavily doped regions, respectively, over inside the channel region. Because a pocket sub-region inside the respective heavily doped regions is formed so as to be located in regions shallower than the respective lower end faces of the heavily doped regions, junction capacitance and junction leak current are reduced. Further, because respective pocket sub-regions inside the channel region are formed in regions deeper than the respective pocket sub-regions inside the heavily doped regions, a short channel effect can be reduced.

Abstract: A semiconductor device includes a silicon layer on an insulating layer. The silicon layer has a first area and a second area. The FD-MOSFET is formed in the first area and the PD-MOSFET formed in the second area. The semiconductor device of the present invention satisfies the. following formulas; the thickness of the silicon layer is 28 nm to 42 nm, the impurity concentration Df cm−3 of the first area is Df≦9.29* 1015* (62.46−ts) and Df≦2.64 * 1015*(128.35−ts), the impurity concentration Dp of the second area is Dp≦9.29 * 1015*(62.46−ts) and Dp≦2.64*1015* (129.78−ts).