Patents by Inventor Marie-Lise Flottes

Marie-Lise Flottes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140266291
    Abstract: A method for automatic detection of defects in TSV vias formed in a layer of semiconductor material, this detection taking place before stacking this layer with a plurality of other layers of semiconductor material for the design of a multilayer chip integrated circuit, comprising: measurement on each of said TSV vias of at least one parameter derived from an electrical characteristic of the TSV vias; detection of defects in said TSV vias according to a comparison of the parameters measured with at least one reference parameter, and calculation of said at least one reference parameter using the measured parameters. The parameter measured on each of the TSV vias comprises an oscillation frequency value derived from a capacitive characteristic of the TSV vias.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT, Universite Montpellier 2 Sciences et Techniques, Centre National de la Recherche Scientifique
    Inventors: Yassine FKIH, Pascal VIVET, Bruno ROUZEYRE, Marie-Lise FLOTTES, Giorgio DI NATALE
  • Patent number: 8792835
    Abstract: A system and method for wirelessly testing integrated circuits provides a multiple layer interface to wirelessly test integrated circuits. A wireless testing structure for an integrated circuit comprises a wireless transceiver and a wireless test interface. The wireless transceiver is configured to receive test information from a tester and transmit test result information to the tester. The wireless test interface is configured to interface between the wireless transceiver and the integrated circuit. The wireless test interface comprises a media access controller and a test control block. The media access controller is configured to implement a media access control protocol for wireless communication. The test control block is configured to decode test information received from the tester, to trigger a test of the integrated circuit in response to the decoded test information, and to encode test result information that is generated by the integrated circuit in response to the test.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: July 29, 2014
    Assignee: Centre National de la Recherche Scientifique
    Inventors: David Andreu, Philippe Cauvet, Marie-Lise Flottes, Ziad Noun, Serge Bernard
  • Publication number: 20110244814
    Abstract: A system and method for wirelessly testing integrated circuits provides a multiple layer interface to wirelessly test integrated circuits. A wireless testing structure for an integrated circuit comprises a wireless transceiver and a wireless test interface. The wireless transceiver is configured to receive test information from a tester and transmit test result information to the tester. The wireless test interface is configured to interface between the wireless transceiver and the integrated circuit. The wireless test interface comprises a media access controller and a test control block. The media access controller is configured to implement a media access control protocol for wireless communication. The test control block is configured to decode test information received from the tester, to trigger a test of the integrated circuit in response to the decoded test information, and to encode test result information that is generated by the integrated circuit in response to the test.
    Type: Application
    Filed: September 22, 2009
    Publication date: October 6, 2011
    Applicant: Centre National de la Recherche Scientifique - CNRS-
    Inventors: David Andreu, Philippe Cauvet, Marie-Lise Flottes, Ziad Noun, Serge Bernard