Patents by Inventor Marie Sia

Marie Sia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230139665
    Abstract: A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 4, 2023
    Inventors: Marie SIA, Yoshihisa KOJIMA, Suguru NISHIKAWA, Riki SUZUKI
  • Patent number: 11573740
    Abstract: A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: February 7, 2023
    Assignee: Kioxia Corporation
    Inventors: Marie Sia, Yoshihisa Kojima, Suguru Nishikawa, Riki Suzuki
  • Publication number: 20210349664
    Abstract: A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.
    Type: Application
    Filed: July 21, 2021
    Publication date: November 11, 2021
    Inventors: Marie SIA, Yoshihisa KOJIMA, Suguru NISHIKAWA, Riki SUZUKI
  • Patent number: 11099783
    Abstract: A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: August 24, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Marie Sia, Yoshihisa Kojima, Suguru Nishikawa, Riki Suzuki
  • Publication number: 20200301611
    Abstract: A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.
    Type: Application
    Filed: August 30, 2019
    Publication date: September 24, 2020
    Inventors: Marie SIA, Yoshihisa KOJIMA, Suguru NISHIKAWA, Riki SUZUKI
  • Publication number: 20190074283
    Abstract: According to one embodiment, a memory system includes a semiconductor memory and a controller. The semiconductor memory includes blocks each containing memory cells. The controller is configured to instruct the semiconductor memory to execute a first operation and a second operation. In the first operation and the second operation, the semiconductor memory selects at least one of the blocks, and applies at least one voltage to all memory cells contained in said selected blocks. A number of blocks to which said voltage is applied per unit time in the second operation is larger than that in the first operation.
    Type: Application
    Filed: August 1, 2018
    Publication date: March 7, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Takehiko AMAKI, Yoshihisa Kojima, Toshikatsu Hida, Marie Sia, Riki Suzuki, Shohei Asami