Abstract: A semiconductor wafer having a main surface is provided. A first etch resistant mask is provided on the main surface. A first reactive ion etching step that forms a first group of trenches using the first etch resistant mask is performed. Each of the trenches in the first group is covered with a second etch resistant mask after performing the first reactive ion etching step. A second reactive ion etching step that forms a second group of trenches using one or both of the first etch resistant mask and the second etch resistant mask is performed. The trenches in the second group are laterally offset from the trenches in the first group. The first and second reactive ion etching processes are performed such that a depth of the trenches of the first group is substantially equal to a depth of the trenches in the second group.

Abstract: A semiconductor wafer having a main surface is provided. A first etch resistant mask is provided on the main surface. A first reactive ion etching step that forms a first group of trenches using the first etch resistant mask is performed. Each of the trenches in the first group is covered with a second etch resistant mask after performing the first reactive ion etching step. A second reactive ion etching step that forms a second group of trenches using one or both of the first etch resistant mask and the second etch resistant mask is performed. The trenches in the second group are laterally offset from the trenches in the first group. The first and second reactive ion etching processes are performed such that a depth of the trenches of the first group is substantially equal to a depth of the trenches in the second group.

Abstract: A multi-layer arrangement of III-V semiconductor layers includes a strained III-V semiconductor layer having a concentration of a constituent element which effects intensity of a conductive channel formed in the multi-layer arrangement. Lattice parameters of the strained III-V semiconductor layer are determined by generating a first scan in a Qx direction for a chosen reflection in reciprocal space based on diffracted X-Ray beam intensity measurements in the Qx direction. A second scan is generated in a Qz direction for the chosen reflection in the reciprocal space based on diffracted X-Ray beam intensity measurements in the Qz direction. The second scan is aligned with a diffracted X-Ray peak in the first scan which identifies the strained III-V semiconductor layer. The degree of strain of the strained III-V semiconductor layer is determined based on the first scan and the concentration of the constituent element based on the second scan.

Abstract: A multi-layer arrangement of III-V semiconductor layers includes a strained III-V semiconductor layer having a concentration of a constituent element which effects intensity of a conductive channel formed in the multi-layer arrangement. Lattice parameters of the strained III-V semiconductor layer are determined by generating a first scan in a Qx direction for a chosen reflection in reciprocal space based on diffracted X-Ray beam intensity measurements in the Qx direction. A second scan is generated in a Qz direction for the chosen reflection in the reciprocal space based on diffracted X-Ray beam intensity measurements in the Qz direction. The second scan is aligned with a diffracted X-Ray peak in the first scan which identifies the strained III-V semiconductor layer. The degree of strain of the strained III-V semiconductor layer is determined based on the first scan and the concentration of the constituent element based on the second scan.