Abstract: A driving circuit for driving a diode includes at least one differential pair including a first output node and a second output node and configured to switch an output current, a current source configured to adjust the output current, a dummy load coupled to the second output node, a first termination resistor coupled between the first output node and a termination ground, and a second termination resistor coupled between the second output node and the termination ground. The output current is supplied to the diode through the first output node by at least one differential pair.

Abstract: A driver for shaping a drive signal includes a pre-emphasis circuit, an offset adjustment circuit, and an amplifier. The pre-emphasis circuit symmetrically emphasizes a rising edge portion and a falling edge portion of the drive signal. The offset adjustment circuit applies a direct-current offset to the drive signal. The amplifier amplifies the drive signal with the direct-current offset adjusted by the adjustment circuit. The amplifier has an input-output characteristic with a nonlinear portion. The offset adjustment circuit adjusts the direct-current offset so that the drive signal is amplified in the nonlinear portion.

Abstract: There is provided an optical receiving device for deriving a signal using for data identification. The optical receiving device includes a demodulator for demodulating a modulated optical signal to an demodulated optical signal, a convertor for converting the demodulated optical signal to a first and a second electric signals, a generator for generating a complement signal by summing the first electric signal of a normal in phase component and the second electric signal of a reverse in phase component, and a suppressor for suppressing, by the use of the complement signal, a variation of potential which appears in a data signal at a time of phase changing of the modulated optical signal, the data signal being a difference of the normal in phase component and the reverse in phase component.

Abstract: A semiconductor integrated circuit includes a cascode circuit having a transistor, a detector circuit and a bias generator circuit. A bias is applied to a substrate of the transistor. The detector circuit generates a signal related to a threshold voltage of the transistor. The bias generator circuit generates the bias based on the signal generated by the detector circuit.

Abstract: An optical communication device includes an optical switch that switches a path of an optical signal; a first path that transmits an optical signal between a first communication unit and the optical switch; a second path that transmits an optical signal between a second communication unit and the optical switch; and a switch controller that controls the optical switch. After an optical connection between the first communication unit and the optical switch and an optical connection between the second communication unit and the optical switch are checked, the switch controller switches the path of the optical signal selected by the optical switch to enable optical communication between the first communication unit and the second communication unit.

Abstract: There is provided an optical transmission system including a first optical transmission apparatus configured to have a first transmission mode in which a first signal is transmitted at a first optical level, and a second transmission mode in which a second signal is transmitted at a second optical level after an operation in the first transmission mode, the first optical level being lower than the second optical level, and a second optical transmission apparatus configured to have a third transmission mode in which a response signal to the first signal is transmitted at the first optical level to the first optical transmission apparatus, and a fourth transmission mode in which a response signal to the second signal is transmitted at the second optical level to the first optical transmission apparatus after an operation in the third transmission mode.

Abstract: There is provided a parallel-serial converter including a selector to convert parallel data to serial data, a flip-flop to which the serial data are input so as to latch the serial data, a generator to generate replica data simulating the serial data, a detector to detect a first switching point of the replica data and a second switching point subsequent to the first switching point, and a controller to control relative timings of timing converted to the serial data in the selector and timing when the serial data is latched in the flip-flop, based on the first switching point and the second switching point.

Abstract: An amplifier circuit includes a first amplifier amplifying an input signal and outputting a first amplified signal, a second amplifier amplifying the first amplified signal and outputting a second amplified signal, and a feedback circuitry feeding back the second amplified signal to the input of the second amplifier. The feedback circuitry includes a feedback transistor that keeps the input level of the second amplifier constant.

Abstract: A driving circuit for driving a diode includes at least one differential pair including a first output node and a second output node and configured to switch an output current, a current source configured to adjust the output current, a dummy load coupled to the second output node, a first termination resistor coupled between the first output node and a termination ground, and a second termination resistor coupled between the second output node and the termination ground. The output current is supplied to the diode through the first output node by at least one differential pair.

Abstract: A driver for shaping a drive signal includes a pre-emphasis circuit, an offset adjustment circuit, and an amplifier. The pre-emphasis circuit symmetrically emphasizes a rising edge portion and a falling edge portion of the drive signal. The offset adjustment circuit applies a direct-current offset to the drive signal. The amplifier amplifies the drive signal with the direct-current offset adjusted by the adjustment circuit. The amplifier has an input-output characteristic with a nonlinear portion. The offset adjustment circuit adjusts the direct-current offset so that the drive signal is amplified in the nonlinear portion.

Abstract: A semiconductor integrated circuit includes a cascode circuit having a transistor, a detector circuit and a bias generator circuit. A bias is applied to a substrate of the transistor. The detector circuit generates a signal related to a threshold voltage of the transistor. The bias generator circuit generates the bias based on the signal generated by the detector circuit.

Abstract: An amplifier circuit including: a multistage amplifier unit including an input-stage transistor and an output-stage transistor and configured to amplify an input signal and to output an amplified signal; and a feedback unit including a first feedback transistor, a second feedback transistor, and a feedback resistor, and configured to feed back the amplified signal to an input of the output-stage transistor in the multistage amplifier unit via the first feedback transistor, the second feedback transistor, and the feedback resistor.

Abstract: There is provided a parallel-serial converter including a selector to convert parallel data to serial data, a flip-flop to which the serial data are input so as to latch the serial data, a generator to generate replica data simulating the serial data, a detector to detect a first switching point of the replica data and a second switching point subsequent to the first switching point, and a controller to control relative timings of timing converted to the serial data in the selector and timing when the serial data is latched in the flip-flop, based on the first switching point and the second switching point.

Abstract: A current source generates a direct-current potential at a terminal of a resistor by supplying a current to the resistor and a diode-connected transistor coupled to the resistor in series.

Abstract: There is provided an optical receiving device for deriving a signal using for data identification. The optical receiving device includes a demodulator for demodulating a modulated optical signal to an demodulated optical signal, a convertor for converting the demodulated optical signal to a first and a second electric signals, a generator for generating a complement signal by summing the first electric signal of a normal in phase component and the second electric signal of a reverse in phase component, and a suppressor for suppressing, by the use of the complement signal, a variation of potential which appears in a data signal at a time of phase changing of the modulated optical signal, the data signal being a difference of the normal in phase component and the reverse in phase component.

Abstract: An amplifier circuit includes a first amplifier amplifying an input signal and outputting a first amplified signal, a second amplifier amplifying the first amplified signal and outputting a second amplified signal, and a feedback circuitry feeding back the second amplified signal to the input of the second amplifier. The feedback circuitry includes a feedback transistor that keeps the input level of the second amplifier constant.

Abstract: An amplifier circuit including: a multistage amplifier unit including an input-stage transistor and an output-stage transistor and configured to amplify an input signal and to output an amplified signal; and a feedback unit including a first feedback transistor, a second feedback transistor, and a feedback resistor, and configured to feed back the amplified signal to an input of the output-stage transistor in the multistage amplifier unit via the first feedback transistor, the second feedback transistor, and the feedback resistor.