Patents by Inventor Marina Sharkansky

Marina Sharkansky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230092663
    Abstract: Disclosed herein is system for buffering processor interrupts from active input devices, such as Bluetooth devices, so that they are aligned with a video refresh rate. The system may include a processor that operates in a first operating mode (e.g., a low power mode) and, in response to an interrupt request, switch to a second operating mode (e.g., a higher power mode). The first operating mode may be different from the second operating mode (e.g., each with a different level of power consumption). The system may also include a video subsystem, in communication with the processor, that provides video information at a refresh rate. The system may also include an input subsystem, such as a wireless communication system, in communication with the processor, that receives an activity trigger representing an activity of a input device, such as a human input device, and provides, based on the refresh rate, the activity trigger to the processor as the interrupt request.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 23, 2023
    Inventors: Michael SHUSTERMAN, Izoslav Slava TCHIGEVSKY, Antonio CHENG, Hakan Magnus ERIKSSON, Gil FAUST, Sunil KUMAR, Justin MADIGAN, Marina SHARKANSKY, Ehud SHTALRID, Gaurav SUTARIA
  • Publication number: 20220200881
    Abstract: A wireless communication device including one or more processors configured to determine a device state; determine a data rate of a signal; determine a latency tolerance value based on the data rate and the device state; and generate a message comprising the latency tolerance value. The wireless communication device may further be configured to determined if the latency tolerance value is a duration associated with a device reception or transmission.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Inventors: Michael Shusterman, Rom Leor, Shimon Lavi, Marina Sharkansky, Oded Liron, Nadav Szanto, Ronen Levi
  • Patent number: 10284501
    Abstract: Technologies for multi-core wireless data transmission include a computing device having a processor with multiple cores and a wireless network interface controller (NIC). The computing device establishes multiple transmission queues that are each associated with a processor core. A driver receives a packet for transmission from an application in the execution context of the application, determines a current processor core of the execution context, adds metadata to the packet indicative of the current core, and enqueues the packet in the transmission queue associated with the current core. The wireless NIC merges the packet with packet data from the other transmission queues, adds a sequence number to each packet, and transmits each packet. The wireless NIC may determine the current processor core based on the metadata of the packet and raise an interrupt to the current processor core in response to transmitting the packet. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: May 7, 2019
    Assignee: Intel IP Corporation
    Inventors: Elad Oren, Marina Sharkansky, Oren Kaidar, Rafi Raskin, Moshe Island
  • Patent number: 10122642
    Abstract: Techniques are provided for managing the forwarding of a data stream to respective cores of a multi-core system, in which the incoming data stream is processed in a hardware machine prior to forwarding the data stream to respective cores. The techniques may include the hardware machine executing an algorithm to identify frames in the data stream having a fake hole therein, generating metadata, and attaching the metadata to any frame in which a fake hole is identified. The metadata may instruct a core that receives the respective frame in which a fake hole has been identified to ignore the fake hole in that respective frame. Also in the algorithm, the hardware machine identifies frames in which a real hole exists and maintains a database log of the real holes and the respective cores among the multiple cores that receive the data stream with the real holes therein, together with a notification to the respective core.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: November 6, 2018
    Assignee: Intel IP Corporation
    Inventors: Oded Oliron Liron, Netanel Nati Bar-David, Marina Sharkansky
  • Publication number: 20180167340
    Abstract: Technologies for multi-core wireless data transmission include a computing device having a processor with multiple cores and a wireless network interface controller (NIC). The computing device establishes multiple transmission queues that are each associated with a processor core. A driver receives a packet for transmission from an application in the execution context of the application, determines a current processor core of the execution context, adds metadata to the packet indicative of the current core, and enqueues the packet in the transmission queue associated with the current core. The wireless NIC merges the packet with packet data from the other transmission queues, adds a sequence number to each packet, and transmits each packet. The wireless NIC may determine the current processor core based on the metadata of the packet and raise an interrupt to the current processor core in response to transmitting the packet. Other embodiments are described and claimed.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 14, 2018
    Inventors: Elad Oren, Marina Sharkansky, Oren Kaidar, Rafi Raskin, Moshe Island
  • Publication number: 20180091434
    Abstract: In a method for managing forwarding of a data stream to respective cores of a multi-core system, the incoming data stream is processed in a hardware machine prior to forwarding the data stream to respective cores. The hardware machine executes an algorithm to identify frames in said data stream respectively having a fake hole therein and generates metadata and attaches metadata to any frame in which a fake hole is identified, the metadata instructing a core that receives the respective frame in which a fake hole has been identified to ignore the fake hole in that respective frame. Also in the algorithm, the hardware machine identifies frames in which a real hole exists and maintains a database log of the real holes and the respective cores among said multiple cores that receive said data stream with said real holes therein, together with a notification to the respective core.
    Type: Application
    Filed: September 29, 2016
    Publication date: March 29, 2018
    Inventors: Oded Oliron Liron, Netanel Nati Bar-David, Marina Sharkansky