Patents by Inventor Marina Shiokawa

Marina Shiokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10727254
    Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: July 28, 2020
    Assignee: Japan Display Inc.
    Inventors: Toshinari Sasaki, Hajime Watakabe, Akihiro Hanada, Marina Shiokawa
  • Patent number: 10580801
    Abstract: The purpose of the invention is to form a flexible display device where the substrate is made of resin, wherein the TFT can be annealed in high temperature; consequently, a reliability of the TFT is improved. The concrete measure is as follows. A display device having a pixel electrode and a TFT including a semiconductor layer on a substrate comprising: a source region of the semiconductor layer connects with a source electrode, a drain region of the semiconductor layer connects with a drain electrode; the pixel electrode connects with the source electrode; the drain electrode connects with a video signal line; a distance between the drain electrode and the substrate is smaller than a distance between the semiconductor and the substrate, the semiconductor layer is formed between the pixel electrode and the substrate.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: March 3, 2020
    Assignee: Japan Display Inc.
    Inventors: Isao Suzumura, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe, Yohei Yamaguchi, Marina Shiokawa, Ryotaro Kimura
  • Patent number: 10461100
    Abstract: A semiconductor device including a substrate, a first insulating layer above the substrate, a first transistor including a first oxide semiconductor layer above the first insulating layer, and a second transistor including a second oxide semiconductor layer above the first insulating layer, a composition of the second oxide semiconductor layer being different from a composition of the first oxide semiconductor layer.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: October 29, 2019
    Assignee: Japan Display Inc.
    Inventors: Toshinari Sasaki, Marina Shiokawa
  • Publication number: 20190312064
    Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 10, 2019
    Inventors: Toshinari SASAKI, Hajime Watakabe, Akihiro Hanada, Marina Shiokawa
  • Patent number: 10396187
    Abstract: A semiconductor device including a first oxide insulating layer, a barrier layer above the first oxide insulating layer, the barrier layer including an opening, a second oxide insulating layer above the first oxide insulating layer at a position overlapping the opening, an oxide semiconductor layer facing the first oxide insulating layer interposed by the second oxide insulating layer at a position overlapping the opening, a gate electrode facing the oxide semiconductor layer at side opposite to the first oxide insulating layer with respect to the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. A contained amount of oxygen in the first oxide insulating layer is larger than a contained amount of oxygen in the second oxide insulating layer.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: August 27, 2019
    Assignee: Japan Display Inc.
    Inventors: Toshinari Sasaki, Masahiro Watabe, Masayoshi Fuchi, Isao Suzumura, Marina Shiokawa
  • Publication number: 20190244979
    Abstract: A display device to improve reliability of the TFT of the oxide semiconductor, including: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.
    Type: Application
    Filed: April 18, 2019
    Publication date: August 8, 2019
    Applicant: Japan Display Inc.
    Inventors: Isao SUZUMURA, Yohei YAMAGUCHI, Hajime WATAKABE, Akihiro HANADA, Hirokazu WATANABE, Marina SHIOKAWA
  • Patent number: 10373982
    Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: August 6, 2019
    Assignee: Japan Display Inc.
    Inventors: Toshinari Sasaki, Hajime Watakabe, Akihiro Hanada, Marina Shiokawa
  • Publication number: 20180342536
    Abstract: The purpose of the invention is to form a flexible display device where the substrate is made of resin, wherein the TFT can be annealed in high temperature; consequently, a reliability of the TFT is improved. The concrete measure is as follows. A display device having a pixel electrode and a TFT including a semiconductor layer on a substrate comprising: a source region of the semiconductor layer connects with a source electrode, a drain region of the semiconductor layer connects with a drain electrode; the pixel electrode connects with the source electrode; the drain electrode connects with a video signal line; a distance between the drain electrode and the substrate is smaller than a distance between the semiconductor and the substrate, the semiconductor layer is formed between the pixel electrode and the substrate.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 29, 2018
    Applicant: Japan Display Inc.
    Inventors: Isao Suzumura, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe, Yohei Yamaguchi, Marina Shiokawa, Ryotaro Kimura
  • Publication number: 20180331127
    Abstract: A semiconductor device including a substrate, a first insulating layer above the substrate, a first transistor including a first oxide semiconductor layer above the first insulating layer, and a second transistor including a second oxide semiconductor layer above the first insulating layer, a composition of the second oxide semiconductor layer being different from a composition of the first oxide semiconductor layer.
    Type: Application
    Filed: April 16, 2018
    Publication date: November 15, 2018
    Inventors: Toshinari SASAKI, Marina SHIOKAWA
  • Publication number: 20180286890
    Abstract: The purpose of the invention is to improve reliability of the TFT of the oxide semiconductor. The invention is characterized as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.
    Type: Application
    Filed: March 16, 2018
    Publication date: October 4, 2018
    Applicant: Japan Display Inc.
    Inventors: Isao Suzumura, Yohei Yamaguchi, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe, Marina Shiokawa
  • Publication number: 20180226498
    Abstract: A semiconductor device including a first oxide insulating layer, a barrier layer above the first oxide insulating layer, the barrier layer including an opening, a second oxide insulating layer above the first oxide insulating layer at a position overlapping the opening, an oxide semiconductor layer facing the first oxide insulating layer interposed by the second oxide insulating layer at a position overlapping the opening, a gate electrode facing the oxide semiconductor layer at side opposite to the first oxide insulating layer with respect to the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. A contained amount of oxygen in the first oxide insulating layer is larger than a contained amount of oxygen in the second oxide insulating layer.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 9, 2018
    Inventors: Toshinari SASAKI, Masahiro Watabe, Masayoshi Fuchi, Isao Suzumura, Marina Shiokawa
  • Publication number: 20170365624
    Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.
    Type: Application
    Filed: June 12, 2017
    Publication date: December 21, 2017
    Inventors: Toshinari Sasaki, Hajime Watakabe, Akihiro Hanada, Marina Shiokawa