Patents by Inventor Marina Wong

Marina Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Logic analysis system for logic emulation systems
    Publication number: 20010010036
    Abstract: A portion of a logic emulation system is configured to sample logic values from the portion of the emulation system that is used to emulate the user digital logic design. These sampled values are then multiplexed by the emulation system to a logic analysis device. Typically, this is a commercially-available logic analyzer. To achieve this functionality, the emulation system is provided with a clock signal that has a higher frequency than the emulation clock signal received from the target or user system. This high speed clock signal is provided to logic analyzer as a strobe signal and controls the transfer of words of logic values from the emulation system to the logic analyzer. As a result, the number of signals that the logic analyzer can effectively sample for a cycle of the emulation clock is increased.
    Type: Application
    Filed: March 12, 2001
    Publication date: July 26, 2001
    Applicant: IKOS Systems, Inc.
    Inventors: Kem Stewart, Charles W. Selvidge, Kenneth Crouch, Marina Wong, Mark Seneski
  • Logic analysis system for logic emulation systems
    Patent number: 6223148
    Abstract: A portion of a logic emulation system is configured to sample logic values from the portion of the emulation system that is used to emulate the user digital logic design. These sampled values are then multiplexed by the emulation system to a logic analysis device. Typically, this is a commercially-available logic analyzer. To achieve this functionality, the emulation system is provided with a clock signal that has a higher frequency than the emulation clock signal received from the target or user system. This high speed clock signal is provided to logic analyzer as a strobe signal and controls the transfer of words of logic values from the emulation system to the logic analyzer. As a result, the number of signals that the logic analyzer can effectively sample for a cycle of the emulation clock is increased.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: April 24, 2001
    Assignee: IKOS Systems, Inc.
    Inventors: Kem Stewart, Charles W. Selvidge, Kenneth Crouch, Marina Wong, Mark Seneski
  • Logic analysis system for logic emulation systems
    Patent number: 5802348
    Abstract: A portion of a logic emulation system is configured to sample logic values from the portion of the emulation system that is used to emulate the user digital logic design. These sampled values are then multiplexed by the emulation system to a logic analysis device. Typically, this is a commercially-available logic analyzer. To achieve this functionality, the emulation system is provided with a clock signal that has a higher frequency than the emulation clock signal received from the target or user system. This high speed clock signal is provided to logic analyzer as a strobe signal and controls the transfer of words of logic values from the emulation system to the logic analyzer. As a result, the number of signals that the logic analyzer can effectively sample for a cycle of the emulation clock is increased.
    Type: Grant
    Filed: December 18, 1995
    Date of Patent: September 1, 1998
    Assignee: Virtual Machine Works, Inc.
    Inventors: Kem Stewart, Charles W. Selvidge, Kenneth Crouch, Marina Wong, Mark Seneski