Patents by Inventor Marinica Rusu

Marinica Rusu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7606886
    Abstract: A method and system for conveying management information across a network are disclosed. The method includes generating an Ethernet packet comprising a converged data link header in place of an Ethernet preamble and transmitting the modified packet from a network element. The header is configured to provide support for network management.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: October 20, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Andreas Bechtolsheim, Hiroshi Suzuki, Marinica Rusu, Paul Frantz, Sharat Prasad
  • Patent number: 7570643
    Abstract: A method of processing Ethernet signals for transport in an optical network system is disclosed. The method includes encapsulating Ethernet frames into EFP frames comprising a length header, a converged data link header, and a data area, and mapping the EFP frames into byte synchronous paths. The converged data link header replaces an Ethernet preamble of the Ethernet packet.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: August 4, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Sharat Prasad, Marinica Rusu, Hiroshi Suzuki, Shankar Venkataraman, Stefano Binetti, Luca Della Chiesa
  • Patent number: 7043541
    Abstract: A method for conveying management information across a network. The method includes receiving an Ethernet packet at a network element and modifying the packet by inserting a header in place of some or all of an unused portion of a preamble within the packet. The header is configured to provide support for network management. The method further includes transmitting the modified packet from the network element. The method may also include examining and updating the header at intermediate network elements and examining and replacing the header with the preamble at an egress network element.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: May 9, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Andreas Bechtolsheim, Hiroshi Suzuki, Marinica Rusu, Paul Frantz, Sharat Prasad
  • Publication number: 20040156390
    Abstract: A method of processing Ethernet signals for transport in an optical network system is disclosed. The method includes encapsulating Ethernet frames into EFP frames comprising a length header, a converged data link header, and a data area, and mapping the EFP frames into byte synchronous paths. The converged data link header replaces an Ethernet preamble of the Ethernet packet.
    Type: Application
    Filed: February 12, 2003
    Publication date: August 12, 2004
    Applicant: Cisco Technology, Inc.
    Inventors: Sharat Prasad, Marinica Rusu, Hiroshi Suzuki, Shankar Venkataraman, Stefano Binetti, Luca Della Chiesa
  • Patent number: 6141323
    Abstract: A queue length measurement device that is comprised of a number of queues that are capable of holding data cells. A differential counter is coupled to each queue. The counter is incremented when a cell is written into the queue and decremented when a cell is read from the queue. An interval measurement device, coupled to the differential counter, generates a pulse to reset the counter at fixed intervals equivalent to n cells time (where n is the maximum number of cells the queue counter can measure). A multiplexer is coupled to the multiple differential counters. A transfer control circuit coupled to the interval measurement device selects the appropriate queue measurement to be output from the multiplexer to the other switch elements. A system and methodology provide for queue flow statistics and closed loop control of cell flow into the queue.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: October 31, 2000
    Assignee: Whittaker Corporation
    Inventors: Marinica Rusu, Ihab A. Jaser
  • Patent number: 6137807
    Abstract: An input processor recognizes and accepts a wide variety of protocols and formats. Queue management stores the uniform cells in a dual balanced bank memory system, which provides for utilizing an available bank of memory when the other bank of memory is in use, and otherwise balancing the use of the banks of memory, thereby maintaining equal free lists. Queue management apparatus and logic also ascertains and appends routing data to the stored data and transmits the data according to its priority.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: October 24, 2000
    Assignee: Whittaker Corporation
    Inventors: Marinica Rusu, Ihab A. Jaser
  • Patent number: 6111880
    Abstract: The present invention is directed to a hybrid packet/cell switching, linking, and control system and methodology for sharing a common internal cell format that supports multiple protocol operations to support both high speed Ethernet and ATM. The architecture is a shared memory common internal cell architecture (ATM is the preferred embodiment), providing capabilities that support multicast data traffic (which is specific in a LAN environment) and accommodates a large shared buffer and linked list queue set groupings to control reading and retrieving the cell and packet encapsulated cell data types to permit intercoupling all combinations of cross/hybrid switching. The new hybrid switch provides both a full non-blocking packet (e.g., Ethernet) switch having a plurality of ports (e.g., 32 @ 100 Mbps (full or half duplex) ports) and a full non-blocking cell (e.g., ATM) switch having a plurality of ports (e.g., 32 @ 155 Mbps ports).
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: August 29, 2000
    Assignee: Whittaker Corporation
    Inventors: Marinica Rusu, Ihab A. Jaser
  • Patent number: 5938749
    Abstract: A queue length measurement device that is comprised of a number of queues that are capable of holding data cells. A differential counter is coupled to each queue. The counter is incremented when a cell is written into the queue and decremented when a cell is read from the queue. An interval measurement device is coupled to the differential counter. The interval measurement device generates a pulse to reset the counter at fixed intervals equivalent to n cells time (where n is the maximum number of cells the queue counter can measure). A multiplexer is coupled to the multiple differential counters. A transfer control circuit coupled to the interval measurement device selects the appropriate queue length to be output from the multiplexer to the other switch elements. A system and methodology are also provided to provide for queue flow statistics and closed loop control of cell flow into the queue. A queue measurement apparatus is provided for measuring a data queue size.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: August 17, 1999
    Assignee: Whittaker Communications Inc.
    Inventors: Marinica Rusu, Ihab A. Jaser