Patents by Inventor Mario Alejandro CASTRILLION

Mario Alejandro CASTRILLION has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784668
    Abstract: A decoder for a receiver in a communication system includes an interface configured to receive encoded input data via a communication channel. The encoded input data includes forward error correction (FEC) codewords. A processor is configured to decode the FEC codewords using low density parity check (LDPC) codes defined by a parity check matrix. The parity check matrix is defined by both regular column partition (RCP) constraints and quasi-cyclic (QC) constraints. An output circuit is configured to output a decoded codeword based on the FEC codewords decoded by the processor.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: October 10, 2023
    Assignee: Marvell Asia Pte, Ltd
    Inventors: Damian Alfonso Morero, Mario Alejandro Castrillion, Matias German Schnidrig, Mario R. Hueda
  • Publication number: 20220158660
    Abstract: A decoder for a receiver in a communication system includes an interface configured to receive encoded input data via a communication channel. The encoded input data includes forward error correction (FEC) codewords. A processor is configured to decode the FEC codewords using low density parity check (LDPC) codes defined by a parity check matrix. The parity check matrix is defined by both regular column partition (RCP) constraints and quasi-cyclic (QC) constraints. An output circuit is configured to output a decoded codeword based on the FEC codewords decoded by the processor.
    Type: Application
    Filed: February 7, 2022
    Publication date: May 19, 2022
    Inventors: Damian Alfonso MORERO, Mario Alejandro CASTRILLION, Matias German SCHNIDRIG, Mario R. HUEDA