Patents by Inventor Mario DeAngelis

Mario DeAngelis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9900988
    Abstract: A protective layering process that encapsulates and protects printed circuit board assemblies with complex and imprecise geometries. The protective layering process provides a combination of a flexible mold and/or a rigid mold, which are derived from modified data from a 3 dimensional scan of the printed circuit board assembly, and which applies close-forming, encapsulating polymer layers, electrically non-conductive layers, EMI shielding layers, and/or thermal management layers to the electronic components and circuit board assemblies. Polymer layers and protective jackets are shaped to as-populated circuit boards and assemblies, providing tightly fit barriers with fine resolution accommodating imprecise geometries. The protective jackets/layers can be formed in rigid, semi-rigid, or highly flexible polymer films, to protect the circuitry from the elements, CTE mismatches, shock and vibration loads and extreme g-forces, and from internal and external EMI and to manage thermal dissipation.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: February 20, 2018
    Assignee: The United States of America as Represented by the Secretary of the Army
    Inventors: Nien-Hua Chao, John A. Dispenza, Mario DeAngelis
  • Patent number: 9860992
    Abstract: A polymer layering process that encapsulates and protects electronics components with complex and imprecise geometries. The protective layering process provides a combination of a flexible mold and/or a rigid mold that apply close-forming, encapsulating the polymer layers to the electronic components and precision assemblies. Polymer layer protective jackets are shaped to as-populated circuit boards and assemblies, providing tightly fit barriers with fine resolution accommodating imprecise geometries. The protective jackets can be formed in rigid, semi-rigid, or highly flexible polymer films, to protect the circuitry from the elements, CTE mismatches, shock and vibration loads and extreme g-forces.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: January 2, 2018
    Assignee: The United States of America as Represented by the Secretary of the Army
    Inventors: Nien-Hua Chao, John A. Dispenza, Mario DeAngelis
  • Patent number: 9254588
    Abstract: A polymer layering process that encapsulates and protects electronics components with complex and imprecise geometries. The protective layering process provides a combination of a flexible mold and/or a rigid mold that apply close-forming, encapsulating the polymer layers to the electronic components and precision assemblies. Polymer layer protective jackets are shaped to as-populated circuit boards and assemblies, providing tightly fit barriers with fine resolution accommodating imprecise geometries. The protective jackets can be formed in rigid, semi-rigid, or highly flexible polymer films, to protect the circuitry from the elements, CTE mismatches, shock and vibration loads and extreme g-forces.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: February 9, 2016
    Assignee: The United States of America as Represented by the Secretary of the Army
    Inventors: Nien-Hua Chao, John A. Dispenza, Mario DeAngelis