Patents by Inventor Mario E. Ecker
Mario E. Ecker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5541005Abstract: A large ceramic substrate article for electronic applications including at least one layer of sintered ceramic material, the layer including a plurality of greensheet segments of ceramic material joined edge to edge. Also disclosed is a method of fabricating a large ceramic greensheet article as well as a large ceramic substrate article.Type: GrantFiled: May 11, 1995Date of Patent: July 30, 1996Assignee: International Business Machines CorporationInventors: Raschid J. Bezama, Jon A. Casey, Mario E. Ecker, Shaji Farooq, Irene S. Frantz, Katherine G. Frase, David H. Gabriels, Lester W. Herron, John U. Knickerbocker, Sarah H. Knickerbocker, Govindarajan Natarajan, John Thomson, Yee-Ming Ting, Sharon L. Tracy, Robert M. Troncillito, Vivek M. Sura, Donald R. Wall, Giai V. Yen
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Patent number: 5439636Abstract: A large ceramic substrate article for electronic applications including at least one layer of sintered ceramic material, the layer including a plurality of greensheet segments of ceramic material joined edge to edge. Also disclosed is a method of fabricating a large ceramic greensheet article as well as a large ceramic substrate article.Type: GrantFiled: February 18, 1992Date of Patent: August 8, 1995Assignee: International Business Machines CorporationInventors: Raschid J. Bezama, Jon A. Casey, Mario E. Ecker, Shaji Farooq, Irene S. Frantz, Katharine G. Frase, David H. Gabriels, Lester W. Herron, John U. Knickerbocker, Sara H. Knickerbocker, Govindarajan Natarajan, John Thomson, Yee-Ming Ting, Sharon L. Tracy, Robert M. Troncillito, Vivek M. Sura, Donald R. Wall, Giai V. Yen
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Patent number: 5396573Abstract: Enables a large number of pluggable-array connectors to be used with a multi-chip module (MCM) by using a connector technique that does not require a significant amount of available surface area on a module. The array connectors provide a large increase in the input/output (I/O) capacity of a module. Each of the connectors has a receptacle supported by a frame around the module, and short flexible transmission lines connect the receptacle to the module. A plug connects a cluster (array) of external transmission lines, which may be optical and/or electrical transmission lines operating in parallel. Optical transmission lines may have optical/electrical transducers mounted on either the frame or module. Frame mounting of optical transducers with a connector receptacle enables a connector to transfer only electrical signals between the connector and the module, regardless of a mix of optical and electrical transmission lines to the same connector plug.Type: GrantFiled: August 3, 1993Date of Patent: March 7, 1995Assignee: International Business Machines CorporationInventors: Mario E. Ecker, Lawrence Jacobowitz, Casimer M. DeCusatis
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Patent number: 5337388Abstract: A matrix of cluster connectors for switching and interconnecting large numbers of optical fiber and/or electrical conductors (such as coaxial lines) to a module used in computers, communications and related applications. The matrix of pluggable cluster connector receptacles is located on a major surface of a module, such as a ceramic multi-chip module or a thin film silicon chip carrier module. A semiconductor wafer is fabricated with a matrix of angled slots fabricated to form the matrix of receptacles. The wafer is a major surface of the module, and may have another opening for chips fastened to the module surface below the wafer. Each angled slot engages an end of a plug member to align any optical fiber ends contained in the cluster held by the plug with a corresponding lens/light signal transducer in the module.Type: GrantFiled: August 3, 1993Date of Patent: August 9, 1994Assignee: International Business Machines CorporationInventors: Lawrence Jacobowitz, Mario E. Ecker, Casimer M. DeCusatis
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Patent number: 5333225Abstract: Obtains a large increase in the number of fiber optic inputs/output (I/O) lines connectable to a module by enabling edge connection of multiple clusters of optical fibers to be connected around a module. Each connector connects a cluster of optical fibers in a small dimension of space on the module. Many distinct pluggable connectors may be provided along one or more edges of a module. The optical-fiber cluster connectors are embedded in indentations around the edges of a multilayer glass/ceramic (MLGC) multi-chip module (MCM), which may be a thermal conduction module (TCM), containing an integrated photonic receiver and/or transmitter for each fiber. Each connector supports a large number of fibers from a single cable, and a large number of connectors may be provided in a single module. Easy plugging and unplugging is obtained for each connector without interferring with any existing cooling apparatus or I/O pins of the module.Type: GrantFiled: August 3, 1993Date of Patent: July 26, 1994Assignee: International Business Machines CorporationInventors: Lawrence Jacobowitz, Mario E. Ecker, Casimer M. DeCusatis
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Patent number: 5304969Abstract: A new interface and a method for making the same, and more particularly, an electrical transmission-line interface and a method for making the same. On a substrate having semiconductors, a driver or receiver circuit is provided to interface with an electrical transmission-line. Integral means for the electrical transmission-line alignment, support and transit through a sealed environment is also provided. A fluid tight seal can also be provided for the various components that are in the interior of the housing. Variable time-delay means is provided for a computer clock system or other microwave applications.Type: GrantFiled: September 25, 1992Date of Patent: April 19, 1994Assignee: International Business Machines CorporationInventors: Lawrence Jacobowitz, Mario E. Ecker
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Patent number: 5241614Abstract: The present invention relates generally to a new interface and a method for making the same, and more particularly, to an optical fiber interface and a method for making the same. On a substrate having semiconductors, a receiver/transmitter connection is provided to interface with an optical fiber. Integral means for the fiber alignment, support and transit through a sealed environment is also provided. The substrate having the receiver/transmitter secured to it with the optical fiber end, is then enclosed in a housing.Type: GrantFiled: June 3, 1992Date of Patent: August 31, 1993Assignee: International Business Machines CorporationInventors: Mario E. Ecker, Lawrence Jacobowitz
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Patent number: 5173668Abstract: The present invention relates generally to a new interface and a method for making the same, and more particularly, to an electrical transmission-line interface and a method for making the same. On a substrate having semiconductors, a driver or receiver circuit is provided to interface with an electrical transmission-line. Integral means for the electrical transmission-line alignment, support and transit through a sealed environment is also provided. A fluid tight seal can also be provided for the various components that are in the interior of the housing. Variable time-delay means is provided for a computer clock system or other microwave applications.Type: GrantFiled: April 29, 1991Date of Patent: December 22, 1992Assignee: International Business Machines CorporationInventors: Lawrence Jacobowitz, Mario E. Ecker
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Patent number: 5155786Abstract: The present invention relates generally to a new interface and a method for making the same, and more particularly, to an optical fiber interface and a method for making the same. On a substrate having semiconductors, a receiver/transmitter connection is provided to interface with an optical fiber. Integral means for the fiber alignment, support and transit through a sealed environment is also provided. The substrate having the receiver/transmitter secured to it with the optical fiber end, is then enclosed in a housing.Type: GrantFiled: April 29, 1991Date of Patent: October 13, 1992Assignee: International Business Machines CorporationInventors: Mario E. Ecker, Lawrence Jacobowitz
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Patent number: 4785135Abstract: Arrangement for reducing cross talk between electrical circuit conductors wherein the conductors lie within individual parallel channels within the same plane or different parallel planes within the induced voltage or cross talk region of an energized and a quiet conductor and either converge or diverge with respect to each other. The amount of relative convergence or divergence, preferably mor than six degrees and less than 15 degrees, is that required to attenuate the magnitude of any signal induced by the activated conductor in a neighboring or quiet conductor to maintain an acceptable and desired signal-to-noise ratio.Type: GrantFiled: July 13, 1987Date of Patent: November 15, 1988Assignee: International Business Machines CorporationInventors: Mario E. Ecker, Leonard T. Olson
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Patent number: 4746815Abstract: A specially designed module and integrated circuit chip therefor which permits the sharing of module EC pads between chip receiver and driver circuits. The chip has a direct normal input line to each receiver circuit therein and a direct normal output line from each driver circuit therein along with signal lines from each of those circuits to various EC pads. The chip further includes a switching and control circuit for switching the receiver circuits and driver circuits between their normal and EC lines to effect an electronic delete function. In a preferred embodiment, a majority of the EC pads are switchably connected via the switching and control circuit to different sets of three adjacent receiver circuits, driver circuits, or a combination thereof. The design permits the use of approximately half the EC pads normally required for a module, while permitting EC connections to be made in most cases to three adjacent receiver or driver circuits simultaneously.Type: GrantFiled: July 3, 1986Date of Patent: May 24, 1988Assignee: International Business Machines CorporationInventors: Harsaran S. Bhatia, Mario E. Ecker, Harry J. Jones, Shashi D. Malaviya
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Patent number: 4549200Abstract: A multi-level integrated circuit packaging system having a primary support frame, an array of secondary support frames mounted in said primary support frame and an array of single chip carriers associated with each secondary support frame. An integrated circuit is encapsulated in each single chip carrier, which may be a variety of carrier types which has an insulated wiring pattern with EC wells and delete lands. The secondary and primary support frames also have EC pads so that a change capability exists to any electrical signal path terminating on the chip.Type: GrantFiled: July 8, 1982Date of Patent: October 22, 1985Assignee: International Business Machines CorporationInventors: Mario E. Ecker, Leonard T. Olson
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Patent number: 4377316Abstract: A system for connecting a semiconductor chip carrier to a printed circuit card is described. The semiconductor chip carrier has a flexible, extendable wiring membrane attached to the bottom thereof which extends beyond the periphery of the semiconductor chip carrier and in the area beyond the periphery is provided with electrical contacts. The electrical contacts are mated to complementary contacts in a printed circuit card which is biased from the semiconductor chip carrier by electrical and thermal contact means. The membrane, inter alia, provides high density electrical contact between the semiconductor and printed circuit card. Various elements thereof and a process for forming the same are described.Type: GrantFiled: February 27, 1981Date of Patent: March 22, 1983Assignee: International Business Machines CorporationInventors: Mario E. Ecker, Leonard T. Olson
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Patent number: 4251852Abstract: Disclosed is a packaging structure wherein one or more integrated circuit semiconductor chips are mounted on membrane-like insulating members. The membrane-like members provide multilevel wiring and interconnection between the chip or chips and a secondary wiring structure. The packaging structure includes a module protective cap (preferably metal) and resilient means supported by said secondary wiring structure. The resilient means physically biases the semiconductor chip or chips against the module protective cap and also accommodate induced chip motion and variation. The packaging structure provides enhanced thermal, mechanical and electrical characteristics.Type: GrantFiled: June 18, 1979Date of Patent: February 17, 1981Assignee: International Business Machines CorporationInventors: Mario E. Ecker, Leonard T. Olson