Abstract: A method uses mild fluorinating agents, such as hydrofluorocarbons—HCFs, perfluorocarbons—PFCs, hydrochlorofluorocarbons HCFCs and chlorofluorocarbons—CFCs, to fine-tune the fluorination process in battery material preparation in order to obtain uniform nanometer-sized surface fluoride coated battery materials. The use of a vertical flow-type tube reactor permits a fine-tuning of the fluorination process by accurately regulating the active gas or mixture of gases flow over battery materials using mass-flow regulators, and precisely setting the temperature with vertical rube furnace. Additionally, these fluorinating agents have slightly different reactivity, decomposing and reacting with battery materials at different temperatures, and therefore, offering additional parameter of fluorination fine-tuning. The method is scalable and can be easily adapted as an industrial solution.

Abstract: A method for fabricating semiconductor structure comprises the steps of providing a substrate including a first crystalline semiconductor material, patterning an opening in a dielectric layer above the substrate, the opening having a bottom, forming a crystalline interlayer on the substrate at least partially covering the bottom, and growing a second crystalline semiconductor material on the crystalline interlayer thereby at least partially filling the opening. The crystalline semiconductor materials are lattice mismatched, and the crystalline interlayer comprises an oxygen compound.

Abstract: A semiconductor structure comprises a substrate comprising a first crystalline semiconductor material, a dielectric layer, above the substrate, defining an opening, a second crystalline semiconductor material at least partially filling the opening, and a crystalline interlayer between the substrate and the second crystalline semiconductor material. The first crystalline semiconductor material and the second crystalline semiconductor material are lattice mismatched, and the crystalline interlayer comprises an oxygen compound. A method for fabricating semiconductor structure comprises the steps of providing a substrate including a first crystalline semiconductor material, patterning an opening in a dielectric layer above the substrate, the opening having a bottom, forming a crystalline interlayer on the substrate at least partially covering the bottom, and growing a second crystalline semiconductor material on the crystalline interlayer thereby at least partially filling the opening.

Abstract: A method for preparing a multilayer substrate includes the step of deposing an epitaxial ?-Al2O3 Miller index (001) layer on a Si Miller index (001) substrate.

Abstract: A semiconductor structure comprises a substrate comprising a first crystalline semiconductor material, a dielectric layer, above the substrate, defining an opening, a second crystalline semiconductor material at least partially filling the opening, and a crystalline interlayer between the substrate and the second crystalline semiconductor material. The first crystalline semiconductor material and the second crystalline semiconductor material are lattice mismatched, and the crystalline interlayer comprises an oxygen compound. A method for fabricating semiconductor structure comprises the steps of providing a substrate including a first crystalline semiconductor material, patterning an opening in a dielectric layer above the substrate, the opening having a bottom, forming a crystalline interlayer on the substrate at least partially covering the bottom, and growing a second crystalline semiconductor material on the crystalline interlayer thereby at least partially filling the opening.

Abstract: A semiconductor structure (1) comprises a dielectric layer (2) including a dielectric material having a dielectric constant higher than that of silicon oxide; a channel region (3) including a compound semiconductor material; a passivation layer (4) including a passivation material between the channel region (3) and the dielectric layer (2); and a barrier layer (5) including a barrier material between the dielectric layer (2) and the passivation layer (4) for reducing a chemical reaction of the dielectric material of the dielectric layer (2) with the passivation material of the passivation layer (4).

Abstract: A method for preparing a multilayer substrate includes the step of deposing an epitaxial ?-Al2O3 Miller index (001) layer on a Si Miller index (001) substrate.

Abstract: A method for preparing a multilayer substrate includes the step of deposing an epitaxial ?-Al2O3 Miller index (001) layer on a Si Miller index (001) substrate.

Abstract: A method for preparing a multilayer substrate includes the step of deposing an epitaxial ?-Al2O3 Miller index (001) layer on a Si Miller index (001) substrate.