Patents by Inventor Mario J. D. Lee

Mario J. D. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7764511
    Abstract: A physical hardware architecture is provided to fulfill flexibility, serviceability and configurability of a multi-processor system. The architecture mainly includes a bottom plane, plural processor boards and a function board. On the front section of the top side of the bottom plane, the processor boards are configured thereon. The function board faces downwards and is configured in an edge-to-edge connection with the front edge of the bottom plane. Function card(s) may be configured vertically on the bottom surface of the function board. On the rear section of the top side of the bottom plane expansion card(s) are configured vertically. With main system fan(s) located on the top of the function board and auxiliary system fan configured under the bottom plane, the multi-processor system will also achieve optimum cooling capability through the architecture.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: July 27, 2010
    Assignee: Mitac International Corp.
    Inventors: Mario J. D. Lee, Tomonori Hirai, Jyh Ming Jong
  • Patent number: 7656669
    Abstract: A scalable computer system includes a reconfigurable chassis module, plural hardware units and one or more inter-plane. The chassis module has plural modular units for configuring the hardware units therein respectively. Each of the modular units has dedicated framework to attach the inter-plane or dedicated fans. The inter-plane is to connect with the separated hardware units between the modular units. Each of the modular units is equipped with compatible male and female joints to engage with each other. Certain fastening assemblies may be applied to secure male-male or female-female joints, thereby enabling the modular units to be front-to-back and/or side-by-side connections.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: February 2, 2010
    Assignee: Mitac International Corp.
    Inventors: Mario J. D. Lee, Tomonori Hirai, Jyh Ming Jong
  • Patent number: 7643286
    Abstract: A symmetric multiprocessor computer is provided with a star interconnection architecture and a cooling system. The star interconnection architecture include a middle plane, and plural first processor boards and second processor boards configured vertically onto opposite surfaces of the middle plane. The first processor boards and the second processor boards are crisscross to each other at the opposite surfaces of the middle plane. The cooling system includes a first cooling module and a second cooling system module configured for generating a plurality of first airflows and second airflows for the first processor boards and the second processor boards respectively, wherein the paths of the first airflows and the second airflows are crisscross to each other at the opposite surfaces of the middle plane.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: January 5, 2010
    Assignee: Mitac International Corp.
    Inventors: Tomonori Hirai, Mario J. D. Lee, Jyh-Ming Jong
  • Publication number: 20090109610
    Abstract: A symmetric multiprocessor computer is provided with a star interconnection architecture and a cooling system. The star interconnection architecture include a middle plane, and plural first processor boards and second processor boards configured vertically onto opposite surfaces of the middle plane. The first processor boards and the second processor boards are crisscross to each other at the opposite surfaces of the middle plane. The cooling system includes a first cooling module and a second cooling system module configured for generating a plurality of first airflows and second airflows for the first processor boards and the second processor boards respectively, wherein the paths of the first airflows and the second airflows are crisscross to each other at the opposite surfaces of the middle plane.
    Type: Application
    Filed: October 24, 2007
    Publication date: April 30, 2009
    Applicant: MITAC INTERNATIONAL CORP.
    Inventors: Tomonori Hirai, Mario J.D. Lee, Jyh-Ming Jong
  • Publication number: 20090043937
    Abstract: A three dimensional interconnection architecture is provided for a multiprocessor computer. The interconnection architecture includes multiple processor boards, one or more interconnection board and one or more edge board. The processor boards are configured parallel to each other, each having plural processors configured thereon. The interconnection board is connected with one side of each of the processor boards to allow one of the processors on one of the processor boards operatively connecting with another one of the processors on another one of the processor boards. The edge board is connected with another side of each of the processor boards to allow one of the processors on one of the processor boards operatively connecting with another one of the processors on another one of the processor boards.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 12, 2009
    Applicant: MITAC INTERNATIONAL CORP.
    Inventors: Mario J.D. Lee, Tomonori Hirai, Jyh Ming Jong
  • Publication number: 20080281475
    Abstract: A fan control architecture is provided for controlling system fan(s) on a computing system that has multiple nodes, a system management network and a fan control module. On each of the nodes a management module is configured to collect system information thereon. In a main fan control scheme, a system management node controls the system fan through the fan control module according to the temperature data sent back from the management module of the other nodes through the system management network. The fan control scheme includes redundant path(s) connected between all the nodes and the fan control module to send high-temperature signals to the fan control module directly. In the case that a threshold high temperature is reached, the fan control module will set the system fan at a predetermined high speed according to the high-temperature signals.
    Type: Application
    Filed: May 9, 2007
    Publication date: November 13, 2008
    Applicant: TYAN COMPUTER CORPORATION
    Inventors: Tomonori Hirai, Mario J.D. Lee
  • Publication number: 20080043427
    Abstract: A scalable computer system includes a reconfigurable chassis module, plural hardware units and one or more inter-plane. The chassis module has plural modular units for configuring the hardware units therein respectively. Each of the modular units has dedicated framework to attach the inter-plane or dedicated fans. The inter-plane is to connect with the separated hardware units between the modular units. Each of the modular units is equipped with compatible male and female joints to engage with each other. Certain fastening assemblies may be applied to secure male-male or female-female joints, thereby enabling the modular units to be front-to-back and/or side-by-side connections.
    Type: Application
    Filed: October 30, 2006
    Publication date: February 21, 2008
    Applicant: TYAN COMPUTER CORPORATION
    Inventors: Mario J.D. Lee, Tomonori Hirai, Jyh Ming Jong
  • Publication number: 20080046617
    Abstract: A physical hardware architecture is provided to fulfill flexibility, serviceability and configurability of a multi-processor system. The architecture mainly includes a bottom plane, plural processor boards and a function board. On the front section of the top side of the bottom plane, the processor boards are configured thereon. The function board faces downwards and is configured in an edge-to-edge connection with the front edge of the bottom plane. Function card(s) may be configured vertically on the bottom surface of the function board. On the rear section of the top side of the bottom plane expansion card(s) are configured vertically. With main system fan(s) located on the top of the function board and auxiliary system fan configured under the bottom plane, the multi-processor system will also achieve optimum cooling capability through the architecture.
    Type: Application
    Filed: March 16, 2007
    Publication date: February 21, 2008
    Applicant: TYAN COMPUTER CORPORATION
    Inventors: Mario J.D. Lee, Tomonori Hirai, Jyh Ming Jong
  • Publication number: 20080043405
    Abstract: A chassis partition architecture of a chassis for configuring a multi-processor system is provided to fulfill flexibility, serviceability and configurability of a multi-processor system. The partition architecture mainly includes the partition architecture mainly includes a node partition, a expansion partition and a function partition. The node partition is located at a middle section of the chassis, mainly for containing several processor boards that are configured vertically and lengthwise. The expansion partition is located behind the node partition, mainly for containing several expansion boards that are configured vertically and lengthwise. And the function partition is located at a front section of the chassis lower than the node partition and the expansion partition, mainly for containing a plurality of function cards that are configured upside-down vertically and lengthwise.
    Type: Application
    Filed: March 16, 2007
    Publication date: February 21, 2008
    Applicant: TYAN COMPUTER CORPORATION
    Inventors: Mario J.D. LEE, Tomonori HIRAI, Jyh Ming JONG